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74ACT899 PDF预览

74ACT899

更新时间: 2024-11-01 22:56:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 80K
描述
9-Bit Latchable Transceiver with Parity Generator/Checker

74ACT899 数据手册

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January 1990  
Revised December 1998  
74ACT899  
9-Bit Latchable Transceiver with Parity  
Generator/Checker  
General Description  
Features  
Latchable transceiver with output sink of 24 mA  
The ACT899 is a 9-bit to 9-bit parity transceiver with trans-  
parent latches. The device can operate as a feed-through  
transceiver or it can generate/check parity from the 8-bit  
data busses in either direction. The ACT899 features inde-  
pendent latch enables for the A-to-B direction and the B-to-  
A direction, a select pin for ODD/EVEN parity, and sepa-  
rate error signal output pins for checking parity.  
Option to select generate parity and check or  
“feed-through” data/parity in directions A-to-B or B-to-A  
Independent latch enable for A-to-B and B-to-A  
directions  
Select pin for ODD/EVEN parity  
ERRA and ERRB output pins for parity checking  
Ability to simultaneously generate and check parity  
May be used in system applications in place of the 280  
May be used in system applications in place of the 657  
and 373 (no need to change T/R to check parity)  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT899QC  
V28A  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450” Square  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Assignment for PCC  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010637.prf  
www.fairchildsemi.com  

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