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74ACT825PCQR PDF预览

74ACT825PCQR

更新时间: 2024-11-02 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 77K
描述
Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP24, PLASTIC, DIP-24

74ACT825PCQR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP24,.6
针数:24Reach Compliance Code:unknown
风险等级:5.37其他特性:WITH TRIPLE OUTPUT ENABLE
系列:ACTJESD-30 代码:R-PDIP-T24
JESD-609代码:e0长度:31.75 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:15.24 mm
Base Number Matches:1

74ACT825PCQR 数据手册

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July 1988  
Revised September 2000  
74ACT825  
8-Bit D-Type Flip-Flop  
General Description  
Features  
The ACT825 is an 8-bit buffered register. They have Clock  
Enable and Clear features which are ideal for parity bus  
interfacing in high performance microprogramming sys-  
tems. Also included are multiple enables that allow multi-  
use control of the interface. The ACT825 has noninverting  
outputs.  
Outputs source/sink 24 mA  
Inputs and outputs are on opposite sides  
TTL compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT825SC  
74ACT825MTC  
74ACT825SPC  
M24B  
MTC24  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
D0D7  
Description  
Data Inputs  
O0O7  
Data Outputs  
Output Enables  
Clock Enable  
Clear  
OE1, OE2, OE3  
EN  
CLR  
CP  
Clock Input  
FACT is a trademark of Fairchild Semiconductor.  
© 2000 Fairchild Semiconductor Corporation  
DS009895  
www.fairchildsemi.com  

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