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74ACT377SCT PDF预览

74ACT377SCT

更新时间: 2024-11-14 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器时钟
页数 文件大小 规格书
13页 422K
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74ACT377SCT 数据手册

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January 2008  
74AC377, 74ACT377  
Octal D-Type Flip-Flop with Clock Enable  
Features  
General Description  
I reduced by 50%  
The AC/ACT377 has eight edge-triggered, D-type flip-  
flops with individual D inputs and Q outputs. The com-  
mon buffered Clock (CP) input loads all flip-flops simulta-  
neously, when the Clock Enable (CE) is LOW.  
CC  
Ideal for addressable register applications  
Clock enable for address and data synchronization  
applications  
The register is fully edge-triggered. The state of each D  
input, one setup time before the LOW-to-HIGH clock  
transition, is transferred to the corresponding flip-flop's Q  
output. The CE input must be stable only one setup time  
prior to the LOW-to-HIGH clock transition for predictable  
operation.  
Eight edge-triggered D-type flip-flops  
Buffered common clock  
Outputs source/sink 24mA  
See 273 for master reset version  
See 373 for transparent latch version  
See 374 for 3-STATE version  
ACT377 has TTL-compatible inputs  
Ordering Information  
Package  
Order Number  
74AC377SC  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC377SJ  
M20D  
74AC377MTC  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
4.4mm Wide  
74ACT377SC  
74ACT377SJ  
74ACT377MTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
4.4mm Wide  
74ACT377PC  
N20A  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©1988 Fairchild Semiconductor Corporation  
74AC377, 74ACT377 Rev. 1.6.1  
www.fairchildsemi.com  

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