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74ACT377SC PDF预览

74ACT377SC

更新时间: 2024-11-13 22:56:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
9页 103K
描述
Octal D-Type Flip-Flop with Clock Enable

74ACT377SC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.05
Is Samacsys:N其他特性:WITH HOLD MODE
系列:ACTJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8015 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:125000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):11 ns认证状态:Not Qualified
座面最大高度:2.642 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mm最小 fmax:125 MHz
Base Number Matches:1

74ACT377SC 数据手册

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November 1988  
Revised November 1999  
74AC377 74ACT377  
Octal D-Type Flip-Flop with Clock Enable  
General Description  
Features  
The AC/ACT377 has eight edge-triggered, D-type flip-flops  
with individual D inputs and Q outputs. The common buff-  
ered Clock (CP) input loads all flip-flops simultaneously,  
when the Clock Enable (CE) is LOW.  
ICC reduced by 50%  
Ideal for addressable register applications  
Clock enable for address and data synchronization  
applications  
The register is fully edge-triggered. The state of each D  
input, one setup time before the LOW-to-HIGH clock transi-  
tion, is transferred to the corresponding flip-flop’s Q output.  
The CE input must be stable only one setup time prior to  
the LOW-to-HIGH clock transition for predictable operation.  
Eight edge-triggered D-type flip-flops  
Buffered common clock  
Outputs source/sink 24 mA  
See 273 for master reset version  
See 373 for transparent latch version  
See 374 for 3-STATE version  
ACT377 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC377SC  
74AC377SJ  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC377MTC  
74AC377PC  
74ACT377SC  
74ACT377SJ  
74ACT377MTC  
74ACT377PC  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
D0D7  
Description  
Data Inputs  
CE  
Clock Enable (Active LOW)  
Data Outputs  
Q0Q7  
CP  
Clock Pulse Input  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009961  
www.fairchildsemi.com  

74ACT377SC 替代型号

型号 品牌 替代类型 描述 数据表
74ACTQ273SC FAIRCHILD

类似代替

Quiet Series Octal D-Type Flip-Flop
74ACT273SC FAIRCHILD

类似代替

Octal D-Type Flip-Flop
MC74ACT273DWG ONSEMI

功能相似

Octal D Flip−Flop

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74ACT377SJQR TI

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ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20