74ACT18823

更新时间： 2024-11-10 23:00:15

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
6页	63K
描述
18-Bit D-Type Flip-Flop with 3-STATE Outputs

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数据手册

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74ACT18823 数据手册

August 1999

Revised October 1999

74ACT18823

18-Bit D-Type Flip-Flop with 3-STATE Outputs

General Description

Features

The ACT18823 contains eighteen non-inverting D-type flip-

flops with 3-STATE outputs and is intended for bus oriented

applications. The device is byte controlled. A buffered clock

(CP), Clear (CLR), Clock Enable (EN) and Output Enable

(OE) are common to each byte and can be shorted

together for full 18-bit operation.

■ Broadside pinout allows for easy board layout

■ Separate control logic for each byte

■ Extra data width for wider address/data paths or buses

carrying parity

■ Outputs source/sink 24 mA

■ TTL-compatible inputs

Ordering Code:

Order Number

74ACT18823SSC

74ACT18823MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names

Description

OE_n

Output Enable Input (Active LOW)

Clear (Active LOW)

Clock Enable (Active LOW)

Clock Pulse Input

Inputs

CLR_n

EN_n

CP_n

I₀–I₁₇

O₀–O₁₇

Outputs

FACT is a trademark of Fairchild Semiconductor Corporation.

DS500294

www.fairchildsemi.com

12 3 4 5 6

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74ACT18823SSC	FAIRCHILD	获取价格	18-Bit D-Type Flip-Flop with 3-STATE Outputs
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