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74ACT16540DLR PDF预览

74ACT16540DLR

更新时间: 2024-11-20 14:50:55
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 102K
描述
ACT SERIES, DUAL 8-BIT DRIVER, INVERTED OUTPUT, PDSO48, 0.300 INCH, SSOP-48

74ACT16540DLR 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.82
其他特性:WITH DUAL OUTPUT ENABLE系列:ACT
JESD-30 代码:R-PDSO-G48长度:15.875 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd):9.5 ns认证状态:Not Qualified
座面最大高度:2.79 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

74ACT16540DLR 数据手册

 浏览型号74ACT16540DLR的Datasheet PDF文件第2页浏览型号74ACT16540DLR的Datasheet PDF文件第3页浏览型号74ACT16540DLR的Datasheet PDF文件第4页浏览型号74ACT16540DLR的Datasheet PDF文件第5页浏览型号74ACT16540DLR的Datasheet PDF文件第6页 
54ACT16540, 74ACT16540  
16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS186A − OCTOBER 1991 − REVISED APRIL 1996  
54ACT16540 . . . WD PACKAGE  
74ACT16540 . . . DL PACKAGE  
(TOP VIEW)  
D
Members of the Texas Instruments  
WidebusFamily  
Inputs Are TTL-Voltage Compatible  
D
D
Provide Extra Data Width Necessary for  
Wider Address/Data Paths  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
VCC  
1Y5  
1Y6  
GND  
1Y7  
1Y8  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
VCC  
2Y5  
2Y6  
GND  
2Y7  
2Y8  
2OE1  
1
48 1OE2  
47 1A1  
46 1A2  
45 GND  
2
D
D
Provide Inverted Data  
3
4
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
5
44  
1A3  
6
43 1A4  
D
D
D
D
D
Flow-Through Architecture Optimizes PCB  
Layout  
7
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VCC  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
VCC  
2A5  
2A6  
GND  
2A7  
2A8  
2OE2  
8
Distributed V and GND Pin Configuration  
CC  
9
Minimizes High-Speed Switching Noise  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
EPIC(Enhanced-Performance Implanted  
CMOS) 1-μm Process  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Shrink  
Small-Outline 300-mil (DL) Package Using  
25-mil Center-to-Center Pin Spacings and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Packages Using 25-mil Center-to-Center  
Pin Spacings  
description  
These 16-bit buffers/bus drivers provide a  
high-performance bus interface for wide data  
paths.  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all corresponding  
outputs are in the high-impedance state.  
The 74ACT16540 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54ACT16540 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
74ACT16540 is characterized for operation from −40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright © 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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