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74ACT16374SSC PDF预览

74ACT16374SSC

更新时间: 2024-10-25 22:16:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 97K
描述
16-Bit D-Type Flip-Flop with 3-STATE Outputs

74ACT16374SSC 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SSOP包装说明:0.300 INCH, MO-118, SSOP-48
针数:48Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.15
Is Samacsys:N系列:ACT
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:8.4 ns传播延迟(tpd):7.8 ns
认证状态:Not Qualified座面最大高度:2.74 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.495 mm
Base Number Matches:1

74ACT16374SSC 数据手册

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August 1999  
Revised October 1999  
74ACT16374  
16-Bit D-Type Flip-Flop with 3-STATE Outputs  
General Description  
Features  
The ACT16374 contains sixteen non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. A buffered clock  
(CP) and Output Enable (OE) are common to each byte  
and can be shorted together for full 16-bit operation.  
Buffered Positive edge-triggered clock  
Separate control logic for each byte  
16-bit version of the ACT374  
Outputs source/sink 24 mA  
TTL-compatible inputs  
Ordering Code:  
Order Number  
74ACT16374SSC  
74ACT16374MTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
CPn  
Clock Pulse Input  
Inputs  
I0–I15  
O0–O15  
Outputs  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS500298  
www.fairchildsemi.com  

74ACT16374SSC 替代型号

型号 品牌 替代类型 描述 数据表
74ACT16374SSCX FAIRCHILD

完全替代

Dual D-Type Flip-Flop
74ACT16374DL TI

功能相似

16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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