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74ACT16254 PDF预览

74ACT16254

更新时间： 2024-02-06 00:25:13
品牌 Logo 应用领域
德州仪器 - TI 复用器输出元件双倍数据速率
页数 文件大小 规格书
6页 94K
描述
16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS

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74ACT16254 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP64,.32,20针数：64
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.25系列：ACT
JESD-30 代码：R-PDSO-G64长度：17 mm
逻辑集成电路类型：MULTIPLEXER功能数量：1
输入次数：2输出次数：1
端子数量：64最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP64,.32,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
传播延迟（tpd）：6.2 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Other Logic ICs
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

74ACT16254 数据手册

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74ACT16254  
16-BIT ADDRESS/DATA MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS527A – AUGUST 1995 – NOVEMBER 1995  
DGG PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
B1  
B3  
B6  
B7  
B9  
GND  
B11  
B13  
B15  
B2  
B4  
B6  
B8  
B10  
GND  
B12  
B14  
B16  
1
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
2
Bus-Hold Inputs Eliminate the Need for  
External Pullup Resistors  
3
4
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
5
OLP  
= 5 V, T = 25°C  
6
CC  
A
7
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
8
9
Packaged in Plastic Thin Shrink  
Small-Outline (DGG) Package  
V
V
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
CC  
CC  
A16  
A15  
A14  
GND  
A13  
A12  
A11  
A10  
GND  
A9  
C16  
C15  
C14  
GND  
C13  
C12  
C11  
C10  
GND  
C9  
description  
The 74ACT16254 is a dual 16-bit, noninverting  
bus-interface device. The A and C ports perform  
a transceiver function, like that of the 74ACT245.  
The B and C ports perform the buffer/driver  
function of the 74ACT244. The A and C port  
outputs are designed to sink up to 12 mA.  
The 74ACT16254 is designed for asynchronous  
communication between data buses. The control  
function implementation minimizes external  
timing requirements.  
A8  
A7  
C8  
C7  
V
V
CC  
A6  
CC  
C6  
C5  
C4  
GND  
C3  
C2  
C1  
NC  
NC  
Data transmission from the A port to the C port,  
C port to A port, or B port to C port is accomplished  
by setting the appropriate logic levels on the bus  
enable (EN1 and EN2) inputs.  
A5  
A4  
GND  
A3  
A2  
A1  
EN2  
EN1  
All outputs are disabled when logic highs are  
placed on both EN1 and EN2; the buses are  
effectively isolated.  
The 74ACT16254 is packaged in TI’s thin shrink  
small-outline package (DGG), which provides  
twice the I/O pin count and functionality of  
standard small-outline packages in the same  
printed-circuit-board area.  
NC – No internal connection  
Active bus-hold circuitry is provided to hold unused or floating data and I/O pins at a valid logic level.  
The 74ACT16254 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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