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74ACT157_01

更新时间: 2024-11-26 05:05:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 复用器
页数 文件大小 规格书
10页 277K
描述
QUAD 2 CHANNEL MULTIPLEXER

74ACT157_01 数据手册

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74ACT157  
QUAD 2 CHANNEL MULTIPLEXER  
HIGH SPEED: t = 5.5 ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4µA(MAX.) at T =25°C  
CC  
A
COMPATIBLE WITH TTL OUTPUTS  
= 2V (MIN.), V = 0.8V (MAX.)  
50TRANSMISSION LINE DRIVING  
V
IH  
IL  
DIP  
SOP  
TSSOP  
T & R  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 4.5V to 5.5V  
DIP  
SOP  
74ACT157B  
74ACT157M  
V
CC  
74ACT157MTR  
74ACT157TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 157  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
the outputs become low. The SELECT decoding  
determines whether the A or B inputs get routed to  
their corresponding Y outputs.  
The device is designed to interface directly High  
Speed CMOS systems with TTL, NMOS and  
CMOS output voltage levels.  
DESCRIPTION  
The 74ACT157 is an advanced high-speed CMOS  
QUAD 2-CHANNEL MULTIPLEXER fabricated  
with sub-micron silicon gate and double-layer  
2
metal wiring C MOS tecnology.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
It consists of four 2-input digital multiplexer with  
common SELECT and STROBE inputs. It is a  
non-inverting multiplexer. When the STROBE  
input is held high selection of data is inhibit and all  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/10  

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