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74ACT138B PDF预览

74ACT138B

更新时间: 2024-11-24 23:00:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 280K
描述
3 TO 8 LINE DECODER (INVERTING)

74ACT138B 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.08系列:ACT
输入调节:STANDARDJESD-30 代码:R-PDIP-T16
JESD-609代码:e3负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.024 A
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:5.1 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

74ACT138B 数据手册

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74ACT138  
3 TO 8 LINE DECODER (INVERTING)  
HIGH SPEED: t = 5ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4µA(MAX.) at T =25°C  
CC  
A
COMPATIBLE WITH TTL OUTPUTS  
= 2V (MIN.), V = 0.8V (MAX.)  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
V
IH  
IL  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 4.5V to 5.5V  
DIP  
SOP  
74ACT138B  
74ACT138M  
V
CC  
74ACT138MTR  
74ACT138TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 138  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
Three enable inputs are provided to ease cascade  
connection and application of address decoders  
for memory systems.  
The device is designed to interface directly High  
Speed CMOS systems with TTL, NMOS and  
CMOS output voltage levels.  
DESCRIPTION  
The 74ACT138 is an advanced high-speed CMOS  
3 TO 8 LINE DECODER (INVERTING) fabricated  
with sub-micron silicon gate and double-layer  
2
metal wiring C MOS tecnology.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
If the device is enabled, 3 binary select inputs (A,  
B, and C) determine which one of the outputs will  
go low. If enable input G1 is held low or either G2A  
or G2B is held high, the decoding function is  
inhibited and all the 8 outputs go to high.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/10  

74ACT138B 替代型号

型号 品牌 替代类型 描述 数据表
CD4514BE TI

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CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS
MC74ACT138N MOTOROLA

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1-OF-8 DECODER/ DEMULTIPLEXER

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