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74ACT125 PDF预览

74ACT125

更新时间: 2024-10-01 23:00:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
8页 77K
描述
QUAD BUS BUFFERS 3-STATE

74ACT125 数据手册

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74ACT125  
QUAD BUS BUFFERS (3-STATE)  
PRELIMINARY DATA  
HIGH SPEED: tPD = 6.5 ns (TYP.) at VCC = 5V  
LOW POWER DISSIPATION:  
ICC = 8 µA (MAX.) at TA = 25 oC  
COMPATIBLE WITH TTL OUTPUTS  
V
IH = 2V (MIN), V = 0.8V (MAX)  
IL  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL =24 mA (MIN)  
BALANCED PROPAGATION DELAYS:  
tPLH tPHL  
OPERATING VOLTAGE RANGE:  
B
M
(Plastic Package)  
(Micro Package)  
ORDER CODES :  
74ACT125B  
74ACT125M  
equivalentBipolar Schottky TTL.  
These devices require the same 3-STATE control  
input G to be taken high to make the output go in  
to the high impedance state.  
VCC (OPR) = 4.5V to 5.5V  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 125  
IMPROVED LATCH-UP IMMUNITY  
The device is designed to interface directly High  
Speed CMOS systems with TTL, NMOS and  
CMOS output voltage levels.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The ACT125 is an high-speedCMOS QUAD BUS  
BUFFERS fabricated with sub-micron silicon gate  
and  
double-layer metal  
wiring  
C2MOS  
technology. It is ideal for low power applications  
maintaining high speed operation similar to  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/8  
May 1997  

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