5秒后页面跳转
74ACT11656DWR PDF预览

74ACT11656DWR

更新时间: 2024-11-18 13:04:51
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件电机
页数 文件大小 规格书
11页 253K
描述
ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO28, PLASTIC, SOIC-28

74ACT11656DWR 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:PLASTIC, SOIC-28针数:28
Reach Compliance Code:unknown风险等级:5.83
Is Samacsys:N其他特性:WITH TRIPLE OUTPUT ENABLE; ODD/EVEN PARITY GENERATION WITH TRISTATE OUTPUTS
系列:ACTJESD-30 代码:R-PDSO-G28
长度:17.9 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:1端口数量:2
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

74ACT11656DWR 数据手册

 浏览型号74ACT11656DWR的Datasheet PDF文件第2页浏览型号74ACT11656DWR的Datasheet PDF文件第3页浏览型号74ACT11656DWR的Datasheet PDF文件第4页浏览型号74ACT11656DWR的Datasheet PDF文件第5页浏览型号74ACT11656DWR的Datasheet PDF文件第6页浏览型号74ACT11656DWR的Datasheet PDF文件第7页 
ꢀ ꢁ ꢂꢃ ꢄꢅꢅꢆ ꢇꢆ  
ꢈ ꢃꢄꢂꢉ ꢊꢋꢌ ꢌ ꢍꢎꢏ ꢉ ꢐꢑ ꢍ ꢒ ꢎꢐ ꢓ ꢍꢎ  
ꢔ ꢐ ꢄꢕ ꢖꢂꢎꢐ ꢄ ꢗ ꢃꢕꢍ ꢃꢘꢍꢎ ꢏꢙ ꢍꢑꢍ ꢎꢂꢄꢈ ꢎ ꢂꢑꢒ ꢚ ꢛꢜꢄꢂꢄ ꢍ ꢈ ꢋꢄ ꢖ ꢋꢄꢜ  
SCAS460A − DECEMBER 1994 − REVISED APRIL 1996  
DW PACKAGE  
(TOP VIEW)  
D
D
Inputs Are TTL-Voltage Compatible  
Combines 244 and 280 Functions In  
One Package  
Y1  
Y2  
OE1  
OE2  
OE3  
A1  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
D
D
D
D
Flow-Through Architecture Optimizes  
PCB Layout  
2
Y3  
3
Center-Pin V  
Minimize High-Speed Switching Noise  
and GND Configurations  
Y4  
4
CC  
Y5  
A2  
5
GND  
GND  
GND  
GND  
Y6  
A3  
6
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity at  
V
7
CC  
V
8
CC  
A4  
A5  
A6  
9
125°C  
10  
11  
Y7  
description  
Y8 12  
ΣE 13  
ΣO 14  
17 A7  
16 A8  
15 PI  
The 74ACT11656 contains eight noninverting  
buffers with 3-state outputs and a 9-bit parity  
generator/checker. The device is intended for  
bus-oriented applications.  
When data is transmitted, the parity input (PI) terminal is configured as an input and combined with the A-input  
data to generate a flag on either parity output (ΣE or ΣO) terminal, depending on the number of inputs that are  
high.  
The output-enable (OE1, OE2, and OE3) inputs can be used to disable the device so that the buses are  
effectively isolated.  
The 74ACT11656 is characterized for operation from −40°C to 85°C.  
FUNCTION TABLES  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
OE3  
L
A
L
L
H
Z
Z
Z
L
L
L
H
X
X
X
H
X
X
X
H
X
X
X
H
PARITY  
OUTPUTS  
NO. OF INPUTS HIGH  
(PI, A1−A8)  
ΣO  
L
ΣE  
H
L
EVEN 0, 2, 4, 6, 8  
ODD 1, 3, 5, 7, 9  
Any OE = high  
H
Z
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢨ  
Copyright 1996, Texas Instruments Incorporated  
ꢤ ꢨ ꢥ ꢤꢝ ꢞꢲ ꢠꢟ ꢣ ꢫꢫ ꢩꢣ ꢡ ꢣ ꢢ ꢨ ꢤ ꢨ ꢡ ꢥ ꢭ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

与74ACT11656DWR相关器件

型号 品牌 获取价格 描述 数据表
74ACT11656N PHILIPS

获取价格

Bus Driver, 1-Func, 8-Bit, True Output, CMOS, PDIP28
74ACT11656N YAGEO

获取价格

Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP28
74ACT11657 TI

获取价格

OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS
74ACT11657D YAGEO

获取价格

Bus Transceiver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO28
74ACT11657D-T YAGEO

获取价格

Bus Transceiver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO28
74ACT11657DW TI

获取价格

Octal Parity Bus Transceivers 28-SOIC -40 to 85
74ACT11657DWR TI

获取价格

Octal Parity Bus Transceivers 28-SOIC -40 to 85
74ACT11657J TI

获取价格

IC,BUS TRANSCEIVER,SINGLE,8-BIT,ACT-CMOS,DIP,28PIN,CERAMIC
74ACT11657N TI

获取价格

IC,BUS TRANSCEIVER,SINGLE,8-BIT,ACT-CMOS,DIP,28PIN,PLASTIC
74ACT11657N YAGEO

获取价格

Bus Transceiver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP28