74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines Directly
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes
PCB Layout
A1
A2
A3
DIR
1
24
2
23 B1
22 B2
Center-Pin V
Minimize High-Speed Switching Noise
and GND Configurations
3
CC
4
21
20
19
18
17
16
15
14
13
A4
B3
B4
V
5
GND
GND
GND
GND
A5
A6
A7
A8
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
6
CC
7
V
CC
500-mA Typical Latch-Up Immunity at
125°C
8
B5
B6
B7
B8
OE
9
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, and Standard Plastic 300-mil
DIPs (NT)
10
11
12
description
The octal bus transceiver is designed for asynchronous two-way communication between data buses. The
control-function implementation minimizes external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the
device so that the buses are effectively isolated.
The 74ACT11245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
OUTPUT
ENABLE
OE
DIRECTION
CONTROL
DIR
OUTPUT
L
L
L
H
X
B data to A bus
A data to B bus
Isolation
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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