5秒后页面跳转
74ACT11032PWLE PDF预览

74ACT11032PWLE

更新时间: 2024-12-01 12:33:03
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
14页 481K
描述
QUADRUPLE 2-INPUT POSITIVE-OR GATES

74ACT11032PWLE 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.76其他特性:CENTER PIN VCC AND GND
系列:ACTJESD-30 代码:R-PDSO-G16
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.024 A
功能数量:4输入次数:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):8 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74ACT11032PWLE 数据手册

 浏览型号74ACT11032PWLE的Datasheet PDF文件第2页浏览型号74ACT11032PWLE的Datasheet PDF文件第3页浏览型号74ACT11032PWLE的Datasheet PDF文件第4页浏览型号74ACT11032PWLE的Datasheet PDF文件第5页浏览型号74ACT11032PWLE的Datasheet PDF文件第6页浏览型号74ACT11032PWLE的Datasheet PDF文件第7页 
74ACT11032  
QUADRUPLE 2-INPUT POSITIVE-OR GATES  
SCAS008C – JULY 1987 – REVISED APRIL 1996  
D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Center-Pin V and GND Configurations to  
Minimize High-Speed Switching Noise  
CC  
1A  
1Y  
1B  
2A  
2B  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
2Y  
GND  
GND  
3Y  
500-mA Typical Latch-Up Immunity at 125°C  
CC  
V
CC  
Package Options Include Plastic  
3A  
3B  
4A  
Small-Outline Packages (D), Plastic Shrink  
Small-Outline Packages (DB), Plastic Thin  
Shrink Small-Outline Packages (PW), and  
Standard Plastic 300-mil DIPs (N)  
4Y  
4B  
description  
This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or  
A B  
Y
in positive logic.  
The 74ACT11032 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each gate)  
OUTPUT  
Y
INPUTS  
A
B
X
H
L
H
X
L
H
H
L
logic symbol  
logic diagram (positive logic)  
1
1A  
16  
1A  
1Y  
1B  
2
3
6
7
1Y  
2Y  
3Y  
4Y  
1B  
15  
2A  
2A  
14  
2Y  
2B  
2B  
11  
3A  
10  
3A  
3Y  
3B  
9
3B  
4A  
4A  
8
4Y  
4B  
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与74ACT11032PWLE相关器件

型号 品牌 获取价格 描述 数据表
74ACT11032PWR TI

获取价格

暂无描述
74ACT11032PWRG4 TI

获取价格

ACT SERIES, QUAD 2-INPUT OR GATE, PDSO16, GREEN, PLASTIC, TSSOP-16
74ACT11034 TI

获取价格

HEX NONINVERTERS
74ACT11034D PHILIPS

获取价格

Buffer, CMOS, PDSO20
74ACT11034D-T PHILIPS

获取价格

Buffer, CMOS, PDSO20
74ACT11034D-T YAGEO

获取价格

Buffer, ACT Series, 6-Func, 1-Input, CMOS, PDSO20
74ACT11034DW TI

获取价格

HEX NONINVERTERS
74ACT11034DWR TI

获取价格

HEX NONINVERTERS
74ACT11034N TI

获取价格

HEX NONINVERTERS
74ACT11074 TI

获取价格

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET