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74ACT00SJX PDF预览

74ACT00SJX

更新时间: 2024-09-12 23:24:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 90K
描述
Quad 2-input NAND Gate

74ACT00SJX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOP
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.4
Is Samacsys:N系列:ACT
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:9.5 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

74ACT00SJX 数据手册

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November 1988  
Revised November 1999  
74AC00 74ACT00  
Quad 2-Input NAND Gate  
General Description  
The AC/ACT00 contains four 2-input NAND gates.  
Features  
ICC reduced by 50%  
Outputs source/sink 24 mA  
ACT00 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC00SC  
74AC00SJ  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide  
74AC00MTC  
74AC00PC  
74ACT00SC  
74ACT00SJ  
74ACT00MTC  
74ACT00PC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide  
M14A  
M14D  
MTC14  
N14A  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form. (PC not available in Tape and Reel.)  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
Description  
Inputs  
Outputs  
On  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009911  
www.fairchildsemi.com  

74ACT00SJX 替代型号

型号 品牌 替代类型 描述 数据表
74ACT00SJ FAIRCHILD

类似代替

Quad 2-Input NAND Gate

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