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74ACQ244 PDF预览

74ACQ244

更新时间: 2024-11-04 22:05:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 106K
描述
Quiet Series. Octal Buffer/Line Driver with 3-STATE Outputs

74ACQ244 数据手册

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July 1989  
Revised November 1999  
74ACQ244 74ACTQ244  
Quiet Series Octal Buffer/Line Driver  
with 3-STATE Outputs  
General Description  
Features  
ICC and IOZ reduced by 50%  
The ACQ/ACTQ244 is an octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus oriented transmitter or receiver which  
provides improved PC board density. The ACQ/ACTQ uti-  
lizes Fairchild Quiet Series technology to guarantee quiet  
output switching and improved dynamic threshold perfor-  
mance. FACT Quiet Series features GTO output control  
and undershoot corrector in addition to a split ground bus  
for superior performance.  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Improved latch-up immunity  
3-STATE outputs drive bus lines or buffer memory  
address registers  
Outputs source/sink 24 mA  
Faster prop delays than the standard AC/ACT244  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACQ244SC  
74ACQ244SJ  
M20B  
M20D  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74ACQ244PC  
74ACTQ244SC  
74ACTQ244SJ  
74ACTQ244QSC  
74ACTQ244MSA  
74ACTQ244PC  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MQA20  
MSA20  
N20A  
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150Wide  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OE1, OE2  
I0I 7  
3-STATE Output Enable Inputs  
Inputs  
O0O 7  
Outputs  
FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010235  
www.fairchildsemi.com  

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