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74AC86SCX-LF PDF预览

74AC86SCX-LF

更新时间: 2024-11-20 13:04:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
7页 84K
描述
XOR Gate, AC Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-120, SOIC-14

74AC86SCX-LF 技术参数

生命周期:Transferred包装说明:SOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.64系列:AC
JESD-30 代码:R-PDSO-G14长度:8.65 mm
逻辑集成电路类型:XOR GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):12.5 ns座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

74AC86SCX-LF 数据手册

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September 1988  
Revised November 1999  
74AC86  
Quad 2-Input Exclusive-OR Gate  
General Description  
The AC86 contains four, 2-input exclusive-OR gates.  
Features  
ICC reduced by 50%  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC86SC  
74AC86SJ  
74AC86MTC  
74AC86PC  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Descriptions  
Pin Names  
A0A3  
Description  
Inputs  
B0B3  
O0O3  
Inputs  
Outputs  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009909  
www.fairchildsemi.com  

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