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74AC374 PDF预览

74AC374

更新时间: 2024-09-08 22:53:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器输出元件
页数 文件大小 规格书
11页 240K
描述
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

74AC374 数据手册

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74AC374  
OCTAL D-TYPE FLIP-FLOP  
WITH 3 STATE OUTPUTS (NON INVERTED)  
HIGH SPEED:  
= 270MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
ORDER CODES  
PACKAGE  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
TUBE  
t
t
PLH  
PHL  
DIP  
SOP  
74AC374B  
74AC374M  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
74AC374MTR  
74AC374TTR  
V
CC  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 374  
IMPROVED LATCH-UP IMMUNITY  
the D inputs.  
While the (OE) input is low, the 8 outputs will be in  
a normal logic state (high or low logic level); while  
OE is in high level, the outputs will be in a high  
impedance state.  
The output control does not affect the internal  
operation of flip-flops; that is, the old data can be  
retained or the new data can be entered even  
while the outputs are off.  
DESCRIPTION  
The 74AC374 is an advanced high-speed CMOS  
OCTAL D-TYPE FLIP-FLOP with 3 STATE  
OUTPUT NON INVERTING fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
These 8 bit D-Type Flip-Flop are controlled by a  
clock input (CK) and an output enable input (OE).  
On the positive transition of the clock, the Q  
outputs will be set to the logic that were setup at  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/11  

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