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74AC32PC_NL PDF预览

74AC32PC_NL

更新时间: 2024-11-11 12:58:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
7页 90K
描述
OR Gate, AC Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14

74AC32PC_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.1
系列:ACJESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:19.18 mm
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.012 A功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:RAIL
峰值回流温度(摄氏度):NOT APPLICABLE电源:3.3/5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

74AC32PC_NL 数据手册

 浏览型号74AC32PC_NL的Datasheet PDF文件第2页浏览型号74AC32PC_NL的Datasheet PDF文件第3页浏览型号74AC32PC_NL的Datasheet PDF文件第4页浏览型号74AC32PC_NL的Datasheet PDF文件第5页浏览型号74AC32PC_NL的Datasheet PDF文件第6页浏览型号74AC32PC_NL的Datasheet PDF文件第7页 
November 1988  
Revised November 1999  
74AC32 74ACT32  
Quad 2-Input OR Gate  
General Description  
The AC/ACT32 contains four, 2-input OR gates.  
Features  
ICC reduced by 50% on 74AC only  
Outputs source/sink 24 mA  
ACT32 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC32SC  
74AC32SJ  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC32MTC  
74AC32PC  
74ACT32SC  
74ACT32MTC  
74ACT32PC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line (PDIP), JEDEC MS-001, 0.300Wide  
M14A  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009919  
www.fairchildsemi.com  

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