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74AC245 PDF预览

74AC245

更新时间: 2024-11-21 22:53:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器输出元件
页数 文件大小 规格书
9页 266K
描述
OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED)

74AC245 数据手册

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74AC245  
OCTAL BUS TRANSCEIVER  
WITH 3 STATE OUTPUTS (NON INVERTED)  
HIGH SPEED: t = 4.5ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
50TRANSMISSION LINE DRIVING  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
DIP  
SOP  
74AC245B  
74AC245M  
V
CC  
74AC245MTR  
74AC245TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 244  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
DIR input. The enable input G can be used to  
disable the device so that the buses are effectively  
isolated..  
All floating bus terminals during HIGH-Z state  
must be held HIGH or LOW  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74AC245 is an advanced high-speed CMOS  
OCTAL  
BUS  
TRANSCEIVER  
(3-STATE)  
fabricated with sub-micron silicon gate and  
double-layer metal wiring C MOS tecnology.  
This IC is intended for two-way asynchronous  
communication between data buses and the  
direction of data transmission is determined by  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/9  

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