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74AC241LCXR PDF预览

74AC241LCXR

更新时间: 2024-11-07 13:01:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
9页 203K
描述
Bus Driver, AC Series, 2-Func, 4-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20

74AC241LCXR 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.26Is Samacsys:N
其他特性:OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION系列:AC
JESD-30 代码:S-CQCC-N20长度:8.89 mm
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:2.54 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:8.89 mmBase Number Matches:1

74AC241LCXR 数据手册

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March 2007  
74AC241, 74ACT241  
tm  
Octal Buffer/Line Driver with 3-STATE Outputs  
Features  
General Description  
I and I reduced by 50%  
The AC/ACT241 is an octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus-oriented transmitter or receiver  
which provides improved PC board density.  
CC  
OZ  
Non-inverting 3-STATE outputs drive bus lines or  
buffer memory address registers  
Outputs source/sink 24mA  
ACT241 has TTL-compatible inputs  
Ordering Information  
Order  
Number  
Package  
Number  
Package Description  
74AC241SC  
74AC241SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC241MTC  
74ACT241SC  
74ACT241SJ  
74ACT241MTC  
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OE  
OE  
3-STATE Output Enable Input  
1
2
3-STATE Output Enable Input  
(Active HIGH)  
I –I  
Inputs  
0
7
O –O  
Outputs  
0
7
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©1988 Fairchild Semiconductor Corporation  
74AC241, 74ACT241 Rev. 1.5  
www.fairchildsemi.com  

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