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74AC16245DGG PDF预览

74AC16245DGG

更新时间： 2024-11-10 22:56:15
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 121K
描述
16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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中文翻译

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74AC16245DGG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：ObsoleteReach Compliance Code：compliant
Factory Lead Time：1 week风险等级：5.6
Is Samacsys：N其他特性：WITH DIRECTION CONTROL
系列：ACJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：12.5 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS TRANSCEIVER
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：8.9 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

74AC16245DGG 数据手册

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54AC16245, 74AC16245  
16-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS235A – MARCH 1990 – REVISED APRIL 1996  
Members of the Texas Instruments  
Widebus Family  
54AC16245 . . . WD PACKAGE  
74AC16245 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
Flow-Through Architecture Optimizes PCB  
Layout  
2
3
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Configuration  
4
CC  
5
6
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
V
7
V
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
500-mA Typical Latch-Up Immunity at 125°C  
9
Package Options Include Plastic Thin  
Shrink Small-Outline (DGG) Package,  
300-mil Shrink Small-Outline (DL) Package  
Using 25-mil Center-to-Center Pin Spacings  
and 380-mil Fine-Pitch Ceramic Flat (WD)  
Package Using 25-mil Center-to-Center Pin  
Spacings  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
description  
V
V
CC  
CC  
The ’AC16245 are 16-bit bus transceivers  
organized as dual-octal noninverting 3-state  
transceivers designed for asynchronous two-way  
communication between data buses. The control  
function implementation minimizes external tim-  
ing requirements  
2B5  
2B6  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
GND  
2B7  
2B8  
2DIR  
These devices allow data transmission from the A  
bus to the B bus or from the B bus to the A bus,  
depending upon the logic level at the direction  
control (DIR) input. The output-enable input (OE)  
can be used to disable the devices so that the  
buses are effectively isolated.  
The 74AC16245 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54AC16245 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
74AC16245 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
CONTROL  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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74AC16245DGG 替代型号

型号 品牌 替代类型 描述 数据表
74AC16245TTR STMICROELECTRONICS

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