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74AC138MTC_NL PDF预览

74AC138MTC_NL

更新时间: 2024-11-27 12:58:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器解复用器
页数 文件大小 规格书
9页 103K
描述
Decoder/Driver, AC Series, Inverted Output, CMOS, PDSO16, 4.40 MM, MO-153, TSSOP-16

74AC138MTC_NL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.16Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:AC
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.012 A湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:15 ns传播延迟(tpd):15 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

74AC138MTC_NL 数据手册

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November 1988  
Revised August 2000  
74AC138 74ACT138  
1-of-8 Decoder/Demultiplexer  
General Description  
Features  
The AC/ACT138 is a high-speed 1-of-8 decoder/demulti-  
plexer. This device is ideally suited for high-speed bipolar  
memory chip select address decoding. The multiple input  
enables allow parallel expansion to a 1-of-24 decoder  
using just three AC/ACT138 devices or a 1-of-32 decoder  
using four AC/ACT138 devices and one inverter.  
ICC reduced by 50%  
Demultiplexing capability  
Multiple input enable for easy expansion  
Active LOW mutually exclusive outputs  
Outputs source/sink 24 mA  
ACT138 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC138SC  
74AC138SJ  
74AC138MTC  
74AC138PC  
74ACT138SC  
74ACT138SJ  
74ACT138PC  
M16A  
M16D  
MTC16  
N16E  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Symbols  
IEEE/IEC  
Pin Descriptions  
Pin Names  
A0A2  
Description  
Address Inputs  
Enable Inputs  
Enable Input  
Outputs  
E1E2  
E3  
O0O7  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS009925  
www.fairchildsemi.com  

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