74AC138

更新时间： 2024-11-26 22:38:55

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		解码器解复用器
页数	文件大小	规格书
9页	103K
描述
1-of-8 Decoder/Demultiplexer

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数据手册

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74AC138 数据手册

November 1988

Revised August 2000

74AC138 • 74ACT138

1-of-8 Decoder/Demultiplexer

General Description

Features

The AC/ACT138 is a high-speed 1-of-8 decoder/demulti-

plexer. This device is ideally suited for high-speed bipolar

memory chip select address decoding. The multiple input

enables allow parallel expansion to a 1-of-24 decoder

using just three AC/ACT138 devices or a 1-of-32 decoder

using four AC/ACT138 devices and one inverter.

■ I_CCreduced by 50%

■ Demultiplexing capability

■ Multiple input enable for easy expansion

■ Active LOW mutually exclusive outputs

■ Outputs source/sink 24 mA

■ ACT138 has TTL-compatible inputs

Ordering Code:

Order Number Package Number

Package Description

74AC138SC

74AC138SJ

74AC138MTC

74AC138PC

74ACT138SC

74ACT138SJ

74ACT138PC

M16A

M16D

MTC16

N16E

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Logic Symbols

IEEE/IEC

Pin Descriptions

Pin Names

A₀–A₂

Description

Address Inputs

Enable Inputs

Enable Input

Outputs

E₁–E₂

E₃

O₀–O₇

FACT is a trademark of Fairchild Semiconductor Corporation.

DS009925

www.fairchildsemi.com

12 3 4 5 6 7...9

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74AC138LCT	FAIRCHILD	获取价格	Decoder/Driver, AC Series, Inverted Output, CMOS, CQCC20, CERAMIC, LCC-20
74AC138LCTR	FAIRCHILD	获取价格	暂无描述