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74AC125PCX PDF预览

74AC125PCX

更新时间: 2024-10-30 20:23:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 89K
描述
Bus Driver, AC Series, 4-Func, 1-Bit, True Output, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14

74AC125PCX 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.62Is Samacsys:N
系列:ACJESD-30 代码:R-PDIP-T14
长度:19.18 mm逻辑集成电路类型:BUS DRIVER
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:5.33 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:NO温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

74AC125PCX 数据手册

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March 1990  
Revised November 1999  
74AC125 74ACT125  
Quad Buffer with 3-STATE Outputs  
General Description  
The AC/ACT125 contains four independent non-inverting  
Features  
ICC reduced by 50%  
buffers with 3-STATE outputs.  
Outputs source/sink 24 mA  
ACT125 has TTL-compatible outputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC125SC  
74AC125SJ  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC125MTC  
74AC125PC  
74ACT125SC  
74ACT125SJ  
74ACT125MTC  
74ACT125PC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M14A  
M14D  
MTC14  
N14A  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Function Table  
Pin Descriptions  
Inputs  
An  
Output  
On  
Pin Names  
Description  
Inputs  
Outputs  
Bn  
An, Bn  
On  
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
Z = HIGH Impedance  
X = Immaterial  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010692  
www.fairchildsemi.com  

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