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74AC11646NT PDF预览

74AC11646NT

更新时间: 2024-11-11 13:04:51
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 124K
描述
Octal Bus Transceivers And Registers 28-PDIP -40 to 85

74AC11646NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DIP, DIP28,.3
Reach Compliance Code:not_compliant风险等级:5.91
其他特性:WITH DIRECTION CONTROL控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:AC
JESD-30 代码:R-PDIP-T28长度:35.69 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP28,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
Prop。Delay @ Nom-Sup:14.5 ns传播延迟(tpd):12.2 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

74AC11646NT 数据手册

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74AC11646  
OCTAL BUS TRANSCEIVER AND REGISTER  
WITH 3-STATE OUTPUTS  
SCAS079A – JULY 1987 – REVISED APRIL 1993  
DW PACKAGE  
(TOP VIEW)  
Independent Registers for A and B Buses  
Multiplexed Real-Time and Stored Data  
Flow-Through Architecture Optimizes  
OE  
A1  
A2  
A3  
A4  
GND  
GND  
GND  
GND  
CLKAB  
SAB  
B1  
B2  
B3  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
PCB Layout  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
B4  
V
CC  
500-mA Typical Latch-Up Immunity  
at 125°C  
V
CC  
B5  
A5 10  
19 B6  
description  
A6  
A7  
B7  
B8  
11  
12  
18  
17  
The 74AC11646 consists of bus transceiver  
circuits, D-type flip-flops, and control circuitry  
arranged for multiplexed transmission of data  
directly from the input bus or from the internal  
registers. Data on the A or B bus is clocked  
into the registers on the low-to-high transition of  
the appropriate clock (CLKAB or CLKBA) input.  
Figure 1 illustrates the four fundamental bus-  
managementfunctionsthatcanbeperformedwith  
the 74AC11646.  
A8 13  
16 CLKBA  
15 SBA  
DIR 14  
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the  
transceiver mode, data present at the high-impedance port may be stored in either register or in both.  
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The  
direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode (OE high),  
A data may be stored in one register and/or B data may be stored in the other register.  
When an output function is disabled, the input function is still enabled and may be used to store and transmit  
data. Only one of the two buses, A or B, may be driven at a time.  
The 74AC11646 is characterized for operation from 40°C to 85°C.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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