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74AC11273NT PDF预览

74AC11273NT

更新时间: 2024-11-09 13:04:51
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
7页 103K
描述
Octal D-Type Flip-Flops With Clear 24-PDIP -40 to 85

74AC11273NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.78系列:AC
JESD-30 代码:R-PDIP-T24长度:31.64 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:55000000 Hz最大I(ol):0.024 A
位数:8功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V传播延迟(tpd):12.4 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:80 MHz
Base Number Matches:1

74AC11273NT 数据手册

 浏览型号74AC11273NT的Datasheet PDF文件第2页浏览型号74AC11273NT的Datasheet PDF文件第3页浏览型号74AC11273NT的Datasheet PDF文件第4页浏览型号74AC11273NT的Datasheet PDF文件第5页浏览型号74AC11273NT的Datasheet PDF文件第6页浏览型号74AC11273NT的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃ ꢄꢄꢅ ꢀꢆ  
ꢇ ꢃꢈꢂꢉꢊꢋ ꢌꢈꢍ ꢎꢏꢊ ꢐꢉ ꢑꢎ ꢌ ꢐꢉꢇ ꢎ  
ꢒ ꢑꢈ ꢓ ꢊꢃ ꢉꢏ ꢂ ꢔ  
SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
Applications Include:  
Buffer/Storage Registers  
Shift Registers  
Pattern Generators  
1Q  
2Q  
CLR  
1D  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
Flow-Through Architecture to Optimize  
3Q  
2D  
3
PCB Layout  
4Q  
3D  
4
Multiple Center-Pin V  
and GND  
CC  
GND  
GND  
GND  
GND  
5Q  
4D  
5
Configurations to Minimize High-Speed  
Switching Noise  
V
6
CC  
7
V
CC  
EPICt (Enhanced-Performance Implanted  
8
5D  
CMOS) 1-mm Process  
9
6D  
10  
11  
12  
6Q  
7D  
500-mA Typical Latch-Up Immunity  
at 125°C  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
7Q  
8D  
8Q  
CLK  
description  
These positive-edge-triggered flip-flops implement D-type flip-flop logic with a direct clear input.  
Data at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going  
edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect  
at the output.  
The 74AC11273 is characterized for operation from − 40°C to 85°C.  
logic symbol  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Q
CLR  
CLK  
24  
13  
CLR  
L
CLK  
X
D
X
H
L
G1  
C1  
L
H
L
H
23  
22  
21  
20  
17  
16  
1
2
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
H
H
L
X
Q
0
3
4
9
10  
15  
14  
11  
12  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
EPIC is a trademark of Texas Instruments Incorporated.  
ꢈꢣ  
Copyright 1993, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  

74AC11273NT 替代型号

型号 品牌 替代类型 描述 数据表
74AC11273DW TI

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Octal D-Type Flip-Flops With Clear 24-SOIC -40 to 85

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