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74AC11132N PDF预览

74AC11132N

更新时间: 2024-01-24 02:11:14
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路输入元件
页数 文件大小 规格书
11页 375K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER

74AC11132N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, DIP-16针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.91Is Samacsys:N
其他特性:CENTER PIN VCC AND GND系列:AC
JESD-30 代码:R-PDIP-T16长度:19.305 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
功能数量:4输入次数:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
传播延迟(tpd):8 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

74AC11132N 数据手册

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74AC11132  
QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER  
SCAS113 – D3482, MARCH 1990 – REVISED APRIL 1993  
D OR N PACKAGE  
(TOP VIEW)  
Operation From Very Slow Input  
Transitions  
Temperature-Compensated Threshold  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1A  
1Y  
1B  
2A  
2B  
V
Levels  
High Noise Immunity  
2Y  
GND  
GND  
3Y  
Flow-Through Architecture Optimizes  
CC  
PCB Layout  
V
CC  
3A  
3B  
4A  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
4Y  
4B  
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
500-mA Typical Latch-Up Immunity at 125°C  
Package Options Include Both Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
description  
Each circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels  
for positive- and negative-going signals. It performs the Boolean function Y = A B or Y = A+B in positive logic.  
These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give  
clean jitter-free output signals.  
The 74AC11132 is characterized for operation from – 40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
L
H
H
X
logic diagram (positive logic)  
logic symbol  
1
1A  
16  
&
2
3
6
7
A
B
1Y  
2Y  
3Y  
4Y  
1B  
15  
Y
2A  
14  
2B  
11  
3A  
10  
3B  
9
4A  
8
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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