Datasheet > 74AC11074DRG4

74AC11074DRG4

更新时间： 2024-02-28 16:56:58

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德州仪器 - TI		/
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描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

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74AC11074DRG4 数据手册

74AC11074

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH CLEAR AND PRESET

SCAS499A – DECEMBER 1986 – REVISED APRIL 1996

D, N, OR PW PACKAGE

Center-Pin V

Minimize High-Speed Switching Noise

and GND Configurations

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

1PRE

GND

1CLK

1CLR

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic

Small-Outline (D) and Thin Shrink

Small-Outline (PW) Packages, and

Standard Plastic 300-mil DIPs (N)

2CLR

2CLK

2PRE

description

This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset (PRE)

or clear (CLR) input sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR

are inactive (high), data at the data (D) input that meets the setup-time requirements are transferred to the

outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is

not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may

be changed without affecting the levels at the outputs.

The 74AC11074 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

PRE

CLR

CLK

†

This configuration is nonstable; that is, it does not

persist when PRE or CLR returns to its inactive

(high) level.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

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74AC11074PW	TI	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET	获取价格