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74AC04SCX_NL PDF预览

74AC04SCX_NL

更新时间: 2024-11-24 13:00:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
10页 300K
描述
Inverter, AC Series, 6-Func, 1-Input, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012, SOIC-14

74AC04SCX_NL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.12系列:AC
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:8.6235 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.012 A
湿度敏感等级:1功能数量:6
输入次数:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3/5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.753 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74AC04SCX_NL 数据手册

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September  
2007  
74AC04, 74ACT04  
Hex Inverter  
tm  
Features  
General Description  
I reduced by 50% on 74AC only  
The AC/ACT04 contains six inverters.  
CC  
Outputs source/sink 24mA  
ACT04 has TTL-compatible inputs  
Ordering Information  
Order  
Number  
Package  
Number  
Package Description  
74AC04SC  
74AC04SJ  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC04MTC  
74AC04PC  
74ACT04SC  
74ACT04MTC  
74ACT04PC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
M14A  
MTC14  
N14A  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in  
Tape and Reel.)  
All packages are lead free per JEDEC: J-STD-020B standard.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Description  
Pin Names  
Description  
A
Inputs  
Outputs  
n
O
n
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©2005 Fairchild Semiconductor Corporation  
74AC04, 74ACT04 Rev. 1.0  
www.fairchildsemi.com  

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