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74AC00M PDF预览

74AC00M

更新时间: 2024-01-22 04:00:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
8页 185K
描述
QUAD 2-INPUT NAND GATE

74AC00M 技术参数

生命周期:Contact Manufacturer包装说明:TSSOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63系列:AC
JESD-30 代码:R-PDSO-G14长度:5 mm
逻辑集成电路类型:NAND GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):11 ns座面最大高度:1.1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

74AC00M 数据手册

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74AC00  
QUAD 2-INPUT NAND GATE  
HIGH SPEED: t = 4ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 2µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
DIP  
SOP  
74AC00B  
74AC00M  
V
CC  
74AC00MTR  
74AC00TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 00  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
The internal circuit is composed of 3 stages in-  
cluding buffer output, which enables high noise  
immunity and stable output.  
All inputs and outputs are equipped with protec-  
tion circuits against static discharge, giving them  
2KV ESD immunity and transient excess voltage.  
DESCRIPTION  
The 74AC00 is an advanced high-speed CMOS  
QUAD 2-INPUT NAND GATE fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS tecnology.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/8  

74AC00M 替代型号

型号 品牌 替代类型 描述 数据表
74AC00MTR STMICROELECTRONICS

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