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74ABT74N PDF预览

74ABT74N

更新时间: 2024-09-18 22:56:15
品牌 Logo 应用领域
恩智浦 - NXP 触发器锁存器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
5页 68K
描述
Dual D-type flip-flop

74ABT74N 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅: 不含铅
是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.62
系列:ABTJESD-30 代码:R-PDIP-T14
JESD-609代码:e4长度:19.025 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.02 A
位数:1功能数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
电源:5 V最大电源电流(ICC):0.05 mA
Prop。Delay @ Nom-Sup:4.7 ns传播延迟(tpd):4 ns
认证状态:Not Qualified座面最大高度:4.2 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:150 MHzBase Number Matches:1

74ABT74N 数据手册

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Philips Semiconductors  
Product specification  
Dual D-type flip-flop  
74ABT74  
QUICK REFERENCE DATA  
DESCRIPTION  
The 74ABT74 is a dual positive edge-triggered D-type flip-flop  
featuring individual data, clock, set, and reset inputs; also true and  
complementary outputs. Set (SD) and reset (RD) are asynchronous  
active low inputs and operate independently of the clock input.  
When set and reset are inactive (high), data at the D input is  
transferred to the Q and Q outputs on the low-to-high transition of  
the clock. Data must be stable just one setup time prior to the  
low-to-high transition of the clock for predictable operation. Clock  
triggering occurs at a voltage level and is not directly related to the  
transition time of the positive-going pulse. Following the hold time  
interval, data at the D input may be changed without affecting the  
levels of the output.  
CONDITIONS  
= 25°C;  
T
SYMBOL PARAMETER  
TYPICAL UNIT  
amb  
GND = 0V  
Propagation  
delay  
CPn to  
Qn, Qn  
t
t
3.0  
ns  
PLH  
PHL  
2.5  
C = 50pF;  
L
CC  
V
= 5V  
t
t
Output to  
Output skew  
OSLH  
OSHL  
0.5  
3
ns  
pF  
µA  
Input  
capacitance  
C
V = 0V or V  
I CC  
IN  
Total supply  
current  
Outputs disabled;  
= 5.5V  
I
50  
CC  
V
CC  
LOGIC SYMBOL (IEEE/IEC)  
PIN CONFIGURATION  
RD1  
D0  
1
2
3
4
5
14  
V
CC  
4
&
S
5
13 RD1  
12 D1  
3
C1  
CP0  
SD1  
Q0  
2
1D  
6
11 CP1  
10 SD1  
1
R
10  
Q0  
6
7
9
8
Q1  
Q1  
S
9
11  
GND  
C2  
12  
2D  
8
SF00045  
13  
R
PIN DESCRIPTION  
PIN NUMBER SYMBOL  
NAME AND FUNCTION  
SF00047  
1, 2, 3, 4, 10,  
11, 12, 13  
RDn, Dn,  
CPn, SDn  
Data inputs  
LOGIC DIAGRAM  
5, 6, 8, 9  
Qn, Qn  
GND  
Data outputs  
7
Ground (0V)  
14  
V
CC  
Positive supply voltage  
4, 10  
SD  
LOGIC SYMBOL  
5, 9  
2
12  
1, 13  
RD  
Q
Q
D0 D1  
6, 8  
3
4
CP0  
3, 11  
2, 12  
CP  
D
SD0  
RD0  
CP1  
SD1  
RD1  
1
11  
10  
13  
V
= Pin 14  
CC  
GND = Pin 7  
Q0 Q0 Q1 Q1  
SF00048  
V
= Pin 14  
CC  
GND = Pin 7  
5
6
9
8
SA00359  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT74 N  
DWG NUMBER  
SOT27-1  
14-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT74 N  
74ABT74 D  
74ABT74 DB  
74ABT74 PW  
14-Pin plastic SO  
74ABT74 D  
SOT108-1  
SOT337-1  
SOT402-1  
14-Pin Plastic SSOP Type II  
14-Pin Plastic TSSOP Type I  
74ABT74 DB  
74ABT74PW DH  
1
1995 Sep 22  
853-1813 15793  

74ABT74N 替代型号

型号 品牌 替代类型 描述 数据表
M74HC73TTR STMICROELECTRONICS

类似代替

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
SN74AS74AN TI

功能相似

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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