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74ABT651PWDH-T PDF预览

74ABT651PWDH-T

更新时间： 2024-11-17 13:04:51
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恩智浦 - NXP /
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74ABT651PWDH-T 数据手册

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Philips Semiconductors  
Product specification  
Octal transceiver/register, inverting (3-State)  
74ABT651  
FEATURES  
• Independent registers for A and B buses  
DESCRIPTION  
The 74ABT651 high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
• The 74ABT651 is the inverting version of the 74ABT652  
• Multiplexed real-time and stored data  
• 3-State outputs  
The 74ABT651 transceiver/register consists of bus transceiver  
circuits with 3-State outputs, D-type flip-flops, and control circuitry  
arranged for multiplexed transmission of data directly from the input  
bus or the internal registers. Data on the A or B bus will be clocked  
into the registers as the appropriate clock pin goes High. Output  
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for  
bus management.  
• Live insertion/extraction permitted.  
• Power-up 3-State  
• Power-up reset  
• Output capability: +64mA/–32mA  
• Latch-up protection exceeds 500mA per Jedec Std 17  
The following examples demonstrate the four fundamental  
bus-management functions that can be performed with the  
74ABT651.  
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015  
The select pins determine whether data is stored or transferred  
through the device in real time.  
and 200 V per Machine Model  
The output enable pins determine the direction of the data flow.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
3.8  
4.4  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
CPBA to An or CPAB to Bn  
Input capacitance  
C
V = 0V or V  
I CC  
4
7
pF  
pF  
µA  
IN  
C
I/O capacitance  
Outputs disabled; V = 0V or V  
O CC  
I/O  
I
Total supply current  
Outputs disabled; V =5.5V  
110  
CCZ  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT651 N  
DWG NUMBER  
SOT222-1  
24-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT651 N  
74ABT651 D  
74ABT651 DB  
74ABT651 PW  
24-Pin plastic SO  
74ABT651 D  
SOT137-1  
24-Pin Plastic SSOP Type II  
24-Pin Plastic TSSOP Type I  
74ABT651 DB  
74ABT651PW DH  
SOT340-1  
SOT355-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN  
SYMBOL  
NUMBER  
FUNCTION  
CPAB  
SAB  
OEAB  
A0  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
CC  
CPAB /  
1, 23  
CPBA  
SBA  
OEBA  
B0  
A to B clock input / B to A clock input  
A to B select input / B to A select input  
CPBA  
SAB /  
2, 22  
SBA  
A1  
A to B Output Enable input /  
B to A Output Enable input  
(active–Low)  
OEAB /  
3, 21  
A2  
B1  
OEBA  
A3  
B2  
4, 5, 6, 7, 8,  
9, 10, 11  
A0 – A7 Data inputs/outputs (A side)  
A4  
B3  
A5  
B4  
20, 19, 18,  
17, 16, 15,  
14, 13  
B0 – B7 Data inputs/outputs (B side)  
A6 10  
A7 11  
B5  
B6  
12  
24  
GND  
Ground (0V)  
GND 12  
B7  
V
CC  
Positive supply voltage  
SA00094  
1
1995 Sep 06  
853-1783 15703  
1234567

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