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74ABT646CMSAX PDF预览

74ABT646CMSAX

更新时间: 2024-11-05 23:23:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线收发器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
9页 100K
描述
Single 8-bit Bus Transceiver

74ABT646CMSAX 数据手册

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April 1992  
Revised November 1999  
74ABT646  
Octal Transceivers and Registers with 3-STATE Outputs  
General Description  
Features  
The ABT646 consists of bus transceiver circuits with 3-  
STATE, D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the input bus  
or from the internal registers. Data on the A or B bus will be  
clocked into the registers as the appropriate clock pin goes  
to a high logic level. Control OE and direction pins are pro-  
vided to control the transceiver function. In the transceiver  
mode, data present at the high impedance port may be  
stored in either the A or the B register or in both. The select  
controls can multiplex stored and real-time (transparent  
mode) data. The direction control determines which bus  
will receive data when the enable control OE is Active  
LOW. In the isolation mode (control OE HIGH), A data may  
be stored in the B register and/or B data may be stored in  
the A register.  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
A and B output sink capability of 64 mA, source capabil-  
ity of 32 mA  
Guaranteed output skew  
Guaranteed multiple output switching specifications  
Output switching specified for both 50 pF and 250 pF  
loads  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed latchup protection  
High impedance glitch free bus loading during entire  
power up and power down cycle  
Nondestructive hot insertion capability  
Ordering Code:  
Order Number Package Number  
Package Description  
74ABT646CSC  
74ABT646CMSA  
74ABT646CMTC  
M24B  
MSA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 4.4mm Wide  
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
A0A7  
Description  
Data Register A Inputs/3-STATE Outputs  
Data Register B Inputs/3-STATE Outputs  
Clock Pulse Inputs  
B0B7  
CPAB, CPBA  
SAB, SBA  
OE  
Select Inputs  
Output Enable Input  
DIR  
Direction Control Input  
© 1999 Fairchild Semiconductor Corporation  
DS010978  
www.fairchildsemi.com  

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