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74ABT2541CSJ PDF预览

74ABT2541CSJ

更新时间: 2024-09-23 22:45:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
9页 103K
描述
Octal Buffer/Line Driver with 25з Series Resistors in the Outputs

74ABT2541CSJ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.3
针数:20Reach Compliance Code:compliant
风险等级:5.66其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW系列:ABT
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.6 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.015 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:4.1 ns传播延迟(tpd):11 ns
认证状态:Not Qualified座面最大高度:2.1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

74ABT2541CSJ 数据手册

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September 1992  
Revised November 1999  
74ABT2541  
Octal Buffer/Line Driver with  
25Series Resistors in the Outputs  
General Description  
Features  
Guaranteed output skew  
The ABT2541 is an octal buffer and line driver designed to  
drive the capacitive inputs of MOS memory drivers,  
address drivers, clock drivers, and bus-oriented transmit-  
ters/receivers. Functionally identical to the ABT541.  
Guaranteed multiple output switching specifications  
Output switching specified for both 50 pF and  
250 pF loads  
The 25series resistors in the outputs reduce ringing and  
eliminate the need for external resistors.  
Guaranteed simultaneously switching noise level and  
dynamic threshold performance  
Guaranteed latchup protection  
High impedance glitch free bus loading during entire  
power up and power down cycle  
Nondestructive hot insertion capability  
Disable time less than enable time to avoid bus  
contention  
Ordering Code:  
Order Number Package Number  
Package Description  
74ABT2541CSC  
74ABT2541CSJ  
74ABT2541CMSA  
74ABT2541CMTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MSA20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OE1, OE2  
I0I7  
Output Enable Input (Active LOW)  
Inputs  
O0O7  
Outputs  
Truth Table  
Schematic of Each Output  
Inputs  
Outputs  
OE1  
OE2  
I
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
L
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
© 1999 Fairchild Semiconductor Corporation  
DS011502  
www.fairchildsemi.com  

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