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74ABT245CPC PDF预览

74ABT245CPC

更新时间: 2024-11-11 22:45:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
11页 121K
描述
Octal Bi-Directional Transceiver with 3-STATE Outputs

74ABT245CPC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.06
其他特性:WITH DIRECTION CONTROL控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:ABT
JESD-30 代码:R-PDIP-T20长度:26.075 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.064 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):30 mA
Prop。Delay @ Nom-Sup:3.6 ns传播延迟(tpd):3.6 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.62 mmBase Number Matches:1

74ABT245CPC 数据手册

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September 1991  
Revised November 1999  
74ABT245  
Octal Bi-Directional Transceiver with 3-STATE Outputs  
General Description  
Features  
The ABT245 contains eight non-inverting bidirectional buff-  
ers with 3-STATE outputs and is intended for bus-oriented  
applications. Current sinking capability is 64 mA on both  
the A and B ports. The Transmit/Receive (T/R) input deter-  
mines the direction of data flow through the bidirectional  
transceiver. Transmit (active HIGH) enables data from A  
Ports to B Ports; Receive (active LOW) enables data from  
B Ports to A Ports. The Output Enable input, when HIGH,  
disables both A and B ports by placing them in a HIGH Z  
condition.  
Bidirectional non-inverting buffers  
A and B output sink capability of 64 mA, source  
capability of 32 mA  
Guaranteed output skew  
Guaranteed multiple output switching specifications  
Output switching specified for both 50 pF and 250 pF  
loads  
Guaranteed simultaneous switching, noise level and  
dynamic threshold performance  
Guaranteed latchup protection  
High impedance glitch-free bus loading during entire  
power up and power down cycle  
Non-destructive hot insertion capability  
Disable time is less than enable time to avoid bus  
contention  
Ordering Code:  
Order Number Package Number  
Package Description  
74ABT245CSC  
74ABT245CSJ  
74ABT245CMSA  
74ABT245CMTC  
74ABT245CPC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MSA20  
MTC20  
N20A  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
OE  
Description  
Output Enable Input (Active LOW)  
Transmit/Receive Input  
T/R  
A0A7  
B0B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS010945  
www.fairchildsemi.com  

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