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74ABT16952CMTD PDF预览

74ABT16952CMTD

更新时间: 2024-11-11 04:47:23
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美国国家半导体 - NSC 触发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
8页 149K
描述
16-Bit Registered Transceiver with TRI-STATE Outputs

74ABT16952CMTD 数据手册

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September 1996  
74ABT16952  
16-Bit Registered Transceiver with TRI-STATE Outputs  
É
General Description  
The ’ABT16952 is a 16-bit registered transceiver. Two 8-bit  
back to back registers store data flowing in both directions  
between two bidirectional buses. Separate clock, clock en-  
Features  
Y
Separate clock, clock enable and TRI-STATE output  
enable provided for each register  
Y
A and B output sink capability of 64 mA source capabil-  
ity of 32 mA  
able and TRI-STATE output enable signals are provided  
É
Y
for each register. The output pins are guaranteed to source  
32 mA (24 mA mil.) and to sink 64 mA (48 mA mil).  
Guaranteed latchup protection  
Y
High impedance glitch free bus loading during entire  
power up and power down cycle  
Y
Nondestructive hot insertion capability  
Commercial  
Package Number  
MS56A  
Package Description  
74ABT16952CSSC (Note 1)  
74ABT16952CMTD (Notes 1, 2)  
56-Lead (0.300 Wide) Molded Shrink Small Outline, JEDEC (SSOP)  
×
56-Lead Molded Thin Shrink Small Outline, JEDEC (TSSOP)  
MTD56  
e
Note 1: Devices also available in 13 reel. Use suffix  
×
Note 2: Contact factory for package availability.  
SSCX and MTDX.  
Pin Descriptions  
Connection Diagram  
Pin Assignment  
for SSOP  
Pin Names  
Description  
A A  
0
Data Register A Inputs/  
B-Register TRI-STATE Outputs  
Data Register B Inputs/  
A-Register TRI-STATE Outputs  
Clock Pulse Inputs  
16  
16  
B B  
0
CPAB , CPBA  
n
n
CEA , CEB  
n
Clock Enable  
n
OEAB , OEBA  
n
Output Enable Inputs  
n
TL/F/11647–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1996 National Semiconductor Corporation  
TL/F/11647  
RRD-B30M96/Printed in U. S. A.  
http://www.national.com  

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