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74ABT16543DGGRG4 PDF预览

74ABT16543DGGRG4

更新时间： 2024-10-28 04:47:23
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
15页 400K
描述
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

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74ABT16543DGGRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP-56针数：56
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.59
Is Samacsys：N其他特性：INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：ABTJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：8功能数量：2
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：5 V
最大电源电流（ICC）：0.035 mAProp。Delay @ Nom-Sup：5.1 ns
传播延迟（tpd）：5.6 ns认证状态：Not Qualified
施密特触发器：No座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：6.1 mm
Base Number Matches：1

74ABT16543DGGRG4 数据手册

 浏览型号74ABT16543DGGRG4的Datasheet PDF文件第2页浏览型号74ABT16543DGGRG4的Datasheet PDF文件第3页浏览型号74ABT16543DGGRG4的Datasheet PDF文件第4页浏览型号74ABT16543DGGRG4的Datasheet PDF文件第5页浏览型号74ABT16543DGGRG4的Datasheet PDF文件第6页浏览型号74ABT16543DGGRG4的Datasheet PDF文件第7页 
SN54ABT16543, SN74ABT16543  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS087C – FEBRUARY 1991 – REVISED JANUARY 1997  
SN54ABT16543 . . . WD PACKAGE  
SN74ABT16543 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1OEAB  
1LEAB  
1CEAB  
GND  
1OEBA  
1LEBA  
1CEBA  
GND  
1B1  
1B2  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
2
3
4
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
1A1  
1A2  
5
at V  
= 5 V, T = 25°C  
CC  
A
6
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
V
V
7
CC  
CC  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
8
Flow-Through Architecture Optimizes PCB  
Layout  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
High-Drive Outputs (–32-mA I , 64-mA I  
)
OL  
OH  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
The ’ABT16543 16-bit registered transceivers  
contain two sets of D-type latches for temporary  
storage of data flowing in either direction. The  
’ABT16543 can be used as two 8-bit transceivers  
or one 16-bit transceiver. Separate latch-enable  
(LEAB or LEBA) and output-enable (OEAB or  
OEBA) inputs are provided for each register to  
permit independent control in either direction of  
data flow.  
V
V
CC  
CC  
2A7  
2A8  
GND  
2CEAB  
2LEAB  
2OEAB  
2B7  
2B8  
GND  
2CEBA  
2LEBA  
2OEBA  
The A-to-B enable (CEAB) input must be low to  
enter data from A or to output data from B. If CEAB  
is low and LEAB is low, the A-to-B latches are  
transparent; a subsequent low-to-high transition  
of LEAB puts the A latches in the storage mode.  
With CEAB and OEAB both low, the 3-state  
B outputs are active and reflect the data present  
at the output of the A latches. Data flow from B to  
A is similar but requires using the CEBA, LEBA,  
and OEBA inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT16543 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16543 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

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