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74221

更新时间： 2024-11-09 22:22:07
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德州仪器 - TI 振荡器
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High Speed CMOS Logic Dual Monostable Multivibrator with Reset

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CD74HC221,  
CD74HCT221  
Data sheet acquired from Harris Semiconductor  
SCHS166A  
High Speed CMOS Logic  
November 1997 - Revised April 1999  
Dual Monostable Multivibrator with Reset  
Features  
Description  
• Overriding RESET Terminates Output Pulse  
• Triggering from the Leading or Trailing Edge  
• Q and Q Buffered Outputs  
The CD74HC221, and CH74HCT221 are dual monostable  
multivibrators with reset. An external resistor (R ) and an  
X
[ /Title  
(CD74  
HC221  
,
CD74  
HCT22  
1)  
external capacitor (C ) control the timing and the accuracy  
X
for the circuit. Adjustment of R and C provides a wide  
X
X
range of output pulse widths from the Q and Q terminals.  
Pulse triggering on the B input occurs at a particular voltage  
level and is not related to the rise and fall time of the trigger  
pulse.  
• Separate Resets  
• Wide Range of Output-Pulse Widths  
• Schmitt Trigger on B Inputs  
• Fanout (Over Temperature Range)  
Once triggered, the outputs are independent of further trigger  
inputs on A and B. The output pulse can be terminated by a  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads LOW level on the Reset (R) pin. Trailing Edge triggering (A)  
/Sub-  
ject  
and leading-edge-triggering (B) inputs are provided for  
triggering from either edge of the input pulse. On power up,  
the IC is reset. If either Mono is not used each input (on the  
unused device) must be terminated either high or low.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
(High  
Speed  
CMOS  
Logic  
Dual  
Monos  
table  
Multi-  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
The minimum value of external resistance, R , is typically 500Ω.  
X
• HC Types  
The minimum value of external capacitance, C , is 0pF. The  
X
calculation for the pulse width is t = 0.7 R C at V = 4.5V.  
- 2V to 6V Operation  
W
X X  
CC  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
Ordering Information  
at V  
= 5V  
CC  
PKG.  
NO.  
• HCT Types  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
- 4.5V to 5.5V Operation  
CD74HC221E  
CD74HCT221E  
CD74HC221M  
CD74HCT221M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
E16.3  
E16.3  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Wafer or die are available which meets all electrical  
specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
Pinout  
CD74HC221, CD74HCT221  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1R  
1Q  
2Q  
1
2
3
4
5
6
7
8
16 V  
CC  
15 1C R  
X
X
14 1C  
X
13 1Q  
12 2Q  
11 2R  
10 2B  
2C  
X
X
2C R  
X
9
2A  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1670.1  
Copyright © Harris Corporation 1997  
1
1234567...11

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