Datasheet > 72V73263

72V73263

更新时间： 2024-11-27 14:57:47

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
37页	587K
描述
16K x 16K TSI, 64 I/O at 2/4/8/16 or 32Mbps, Rate-Matching, 3.3V

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数据手册

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72V73263 数据手册

3.3 VOLT TIME SLOT INTERCHANGE

DIGITAL SWITCH WITH RATE

MATCHING 16,384 X 16,384 CHANNELS

IDT72V73263

•

Selectable Synchronous and Asynchronous Microprocessor

bus timing modes

IEEE-1149.1 (JTAG) Test Port

Availablein208-pin(17mmx17mm)PlasticBallGridArray(PBGA)

Operating Temperature Range -40°C to +85°C

FEATURES:

•

Up to 64 serial input and output streams

Maximum 16,384 x 16,384 channel non-blocking switching

Accepts data streams at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s,

16.384Mb/s or 32.768Mb/s

•

Rate matching capability: rate selectable on both RX and TX

in eight groups of 8 streams

Optional Output Enable Indication Pins for external driver

High-Z control

Per-channel Variable Delay Mode for low-latency applications

Per-channel Constant Delay Mode for frame integrity applications

Enhanced Block programming capabilities

TX/RX Internal Bypass

Automatic identification of ST-BUS and GCI serial streams

Per-stream frame delay offset programming

Per-channel High-Impedance output control

Per-channelprocessormodetoallowmicroprocessor writestoTX

streams

DESCRIPTION:

TheIDT72V73263hasanon-blockingswitchcapacityof 16,384x16,384

channelsat32.768Mb/s.With64inputsand64outputs,programmableper

streamcontrol, andavarietyofoperatingmodestheIDT72V73263is

designed for the TDM time slot interchange function in either voice or data

applications.

•

Some of the main features of the IDT72V73263 are LOW power 3.3 Volt

operation,automaticST-BUS^®/GCIsensing,memoryblockprogramming,

simplemicroprocessorinterface,JTAGTestAccessPort(TAP)andper

stream programmable input offset delay, variable or constant throughput

modes,outputenableandprocessormode,BERtesting, bypassmode,and

advancedblockprogramming.

•

Bit Error Rate Testing (BERT) for testing

Direct microprocessor access to all internal memories

FUNCTIONALBLOCKDIAGRAM

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheST-BUS isatrademarkofMitelCorp.

September 2007

DSC-6160/4

12 3 4 5 6 7...37

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