3.3VMULTI-QUEUEFLOW-CONTROLDEVICES
(16QUEUES)36BITWIDECONFIGURATION
589,824bits
1,179,648bits
2,359,296bits
IDT72V51436
IDT72V51446
IDT72V51456
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Shows PAE and PAF status of 8 Queues
Direct or polled operation of flag status bus
Global Bus Matching - (All Queues have same Input Bus Width
and Output Bus Width)
User Selectable Bus Matching Options:
– x36in to x36out
– x18in to x36out
– x9in to x36out
– x36in to x18out
– x36in to x9out
FWFT mode of operation on read port
Packet mode operation
Partial Reset, clears data in single Queue
Expansion of up to 8 multi-queue devices in parallel is available
JTAG Functionality (Boundary Scan)
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm
HIGH Performance submicron CMOS technology
Industrial temperature range (-40°C to +85°C) is available
FEATURES:
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Choose from among the following memory density options:
IDT72V51436
IDT72V51446
IDT72V51456
Total Available Memory = 589,824 bits
Total Available Memory = 1,179,648 bits
Total Available Memory = 2,359,296 bits
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Configurable from 1 to 16 Queues
Queues may be configured at master reset from the pool of
Total Available Memory in blocks of 256 x 36
Independent Read and Write access per queue
User programmable via serial port
Default multi-queue device configurations
– IDT72V51436 : 1,024 x 36 x 16Q
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– IDT72V51446 : 2,048 x 36 x 16Q
– IDT72V51456 : 4,096 x 36 x 16Q
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100% Bus Utilization, Read and Write on every clock cycle
166 MHz High speed operation (6ns cycle time)
3.7ns access time
Individual, Active queue flags (OV, FF, PAE, PAF, PR)
8 bit parallel flag status on both read and write ports
FUNCTIONALBLOCKDIAGRAM
MULTI-QUEUE FLOW-CONTROL DEVICE
Q
0
1
RADEN
ESTR
WADEN
FSTR
WRADD
RDADD
Q
7
8
REN
WEN
RCLK
WCLK
Q2
OE
Q
out
D
in
x36
x36
DATA IN
DATA OUT
OV
FF
PR
PAF
PAE
Q15
PAFn
8
PAEn/PRn
8
5935 drw01
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc
JUNE 2003
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
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