Datasheet > 72V3652L10PF8

72V3652L10PF8

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
29页	227K
描述
TQFP-120, Reel

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

72V3652L10PF8 数据手册

3.3 VOLT CMOS SyncBiFIFO^TM

2,048 x 36 x 2

4,096 x 36 x 2

IDT72V3652

IDT72V3662

IDT72V3672

8,192 x 36 x 2

• Select IDT Standard timing (using EFA, EFB, FFA and FFB flags

functions) or First Word Fall Through timing (using ORA, ORB, IRA

and IRB flag functions)

• Available in 132-pin Plastic Quad Flatpack (PQFP) or space-saving

120-pin Thin Quad Flatpack (TQFP)

• Pin and functionally compatible versions of the 5V operating

IDT723652/723662/723672

• Pin compatible to the lower density parts, IDT72V3622/72V3632/

72V3642

FEATURES

• Memory storage capacity:

IDT72V3652

IDT72V3662

IDT72V3672

–

2,048 x 36 x 2

4,096 x 36 x 2

8,192 x 36 x 2

• Supports clock frequencies up to 100MHz

• Fast access times of 6.5ns

• Free-running CLKA and CLKB may be asynchronous or coincident

(simultaneous reading and writing of data on a single clock edge

is permitted)

• Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

• Two independent clocked FIFOs buffering data in opposite direc-

tions

DESCRIPTION

• Mailbox bypass register for each FIFO

• Programmable Almost-Full and Almost-Empty flags

• Microprocessor Interface Control Logic

• FFA/IRA, EFA/ORA, AEA, and AFA flags synchronized by CLKA

• FFB/IRB, EFB/ORB, AEB, and AFB flags synchronized by CLKB

TheIDT72V3652/72V3662/72V3672arepinand functionallycompatible

versionsoftheIDT723652/723662/723672,designedtorunoffa3.3Vsupply

forexceptionallylow-powerconsumption. Thesedevicesaremonolithic,high-

speed,low-power,CMOSBidirectionalSyncFIFO(clocked)memorieswhich

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

CLKA

CSA

W/RA

ENA

Port-A

Control

Logic

RAM

ARRAY

2,048 x 36

4,096 x 36

8,192 x 36

MBA

FIFO1,

Mail1

Reset

Logic

RST1

Write

Pointer

Read

Pointer

Status Flag

Logic

EFB/ORB

AEB

FFA/IRA

AFA

FIFO 1

Programmable Flag

Offset Registers

Timing

Mode

FWFT

- A35

B0 - B35

FIFO 2

Status Flag

EFA/ORA

FFB/IRB

AFB

Logic

AEA

Read

Pointer

Write

Pointer

FIFO2,

Mail2

Reset

Logic

RST2

RAM

ARRAY

2,048 x 36

4,096 x 36

8,192 x 36

CLKB

CSB

W/RB

ENB

Port-B

Control

Logic

Mail 2

MBB

4660 drw01

MBF2

C^IDTO^andM^theM^IDTE^logR^oaC^rereI^gA^isteL^redtrT^adeE^maM^rkoP^fInE^tegR^rateA^dDT^evU^iceTR^ecE^hnologR^y,IA^nc.N^SynG^cBE^{iFIFOisatrademarkofIntegratedDeviceTechnology,Inc.}

FEBRUARY 2009

DSC-4660/5

12 3 4 5 6 7...29

中文翻译

下载PDF

与72V3652L10PF8相关器件

型号	品牌	获取价格	描述	数据表
72V3652L10PFG	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO
72V3652L10PQFG	IDT	获取价格	Bi-Directional FIFO, 2KX36, 6.5ns, Synchronous, CMOS, PQFP132, GREEN, PLASTIC, QFP-132
72V3652L15PFG	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO
72V3652L15PQF	IDT	获取价格	PQFP-132, Tray
72V3652L15PQFG	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO
72V3653L10PF	IDT	获取价格	TQFP-128, Tray
72V3653L10PFG	IDT	获取价格	3.3 VOLT CMOS SyncFIFO WITH BUS-MATCHING
72V3653L10PFG8	IDT	获取价格	3.3 VOLT CMOS SyncFIFO WITH BUS-MATCHING
72V3653L15PF8	IDT	获取价格	TQFP-128, Reel
72V3653L15PFG	IDT	获取价格	3.3 VOLT CMOS SyncFIFO WITH BUS-MATCHING

与72V3652L10PF8相关文章

L6234手册解读：引脚信息、电气参数
2024-07-01

1
解读BSP135H6327资料：电气参数及替换型号推荐
2024-07-01

1
FDG6302P资料解析：电气参数、产品特性
2024-07-01

3
SBAV99WT1G资料手册：参数信息、产品特性、替代型号推荐
2024-07-01

2

产品中心

服务支持

精选活动

关于我们

帮助中心

72V3652L10PF8

72V3652L10PF8 数据手册

与72V3652L10PF8相关器件

与72V3652L10PF8相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

72V3652L10PF8

72V3652L10PF8 数据手册

与72V3652L10PF8相关器件

与72V3652L10PF8相关文章

您还可以找

您在本页遇到什么问题？