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72V3631L20PQFG PDF预览

72V3631L20PQFG

更新时间: 2024-09-23 15:28:27
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
21页 185K
描述
FIFO, 512X36, 12ns, Synchronous, CMOS, PQFP132, GREEN, PLASTIC, QFP-132

72V3631L20PQFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:QFP,针数:132
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.8
最长访问时间:12 ns其他特性:MAILBOX
周期时间:20 nsJESD-30 代码:S-PQFP-G132
JESD-609代码:e3长度:24.13 mm
内存密度:18432 bit内存宽度:36
功能数量:1端子数量:132
字数:512 words字数代码:512
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512X36
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:SQUARE
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:4.57 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:24.13 mmBase Number Matches:1

72V3631L20PQFG 数据手册

 浏览型号72V3631L20PQFG的Datasheet PDF文件第2页浏览型号72V3631L20PQFG的Datasheet PDF文件第3页浏览型号72V3631L20PQFG的Datasheet PDF文件第4页浏览型号72V3631L20PQFG的Datasheet PDF文件第5页浏览型号72V3631L20PQFG的Datasheet PDF文件第6页浏览型号72V3631L20PQFG的Datasheet PDF文件第7页 
3.3 VOLT CMOS SyncFIFOTM  
512 x 36  
1,024 x 36  
IDT72V3631  
IDT72V3641  
IDT72V3651  
2,048 x 36  
Available in 132-pin plastic quad flat package (PQFP) or space-  
saving 120-pin thin quad flat package (TQFP)  
Pin and functionally compatible versions of the 5V operating  
IDT723631/723641/723651  
FEATURES  
Storage capacity:  
IDT72V3631 - 512 x 36  
IDT72V3641 - 1,024 x 36  
IDT72V3651 - 2,048 x 36  
Easily expandable in width and depth  
Industrial temperature range (–40°C to +85°C) is available  
Supports clock frequencies up to 67 MHz  
Fast access times of 10ns  
Green parts are available, see ordering information  
Free-running CLKA and CLKB can be asynchronous or coinci-  
dent (permits simultaneous reading and writing of data on a  
single clock edge)  
Clocked FIFO buffering data from Port A to Port B  
Synchronous read retransmit capability  
Mailbox register in each direction  
Programmable Almost-Full and Almost-Empty flags  
Microprocessor interface control logic  
Input Ready (IR) and Almost-Full (AF) flags synchronized by  
CLKA  
Output Ready (OR) and Almost-Empty (AE) flags synchronized  
by CLKB  
DESCRIPTION  
TheIDT72V3631/72V3641/72V3651arepinandfunctionallycompatible  
versonsoftheIDT723631/723641/723651,designedtorunoffa3.3Vsupply  
forexceptionallylow-powerconsumption. Thesedevicesaremonolithichigh-  
speed,low-power,CMOSclockedFIFOmemory. Itsupportsclockfrequencies  
upto67MHzandhasreadaccesstimesasfastas10ns. The512/1,024/2,048  
x36dual-portSRAMFIFObuffersdatafromportAtoPortB. TheFIFOmemory  
has retransmitcapability, whichallows previouslyreaddata tobe accessed  
again. The FIFOoperates inFirstWordFallThroughmode andhas flags to  
indicateemptyandfullconditionsandconditionsandtwoprogrammableflags  
(Almost-FullandAlmost-Empty)toindicatewhenaselectednumberofwords  
FUNCTIONAL BLOCK DIAGRAM  
MBF1  
Mail 1  
Register  
CLKA  
CSA  
W/RA  
ENA  
MBA  
Port-A  
Control  
Logic  
RAM ARRAY  
512 x 36  
1,024 x 36  
2,048 x 36  
Reset  
Logic  
RST  
RTM  
36  
Read  
Pointer  
Write  
Pointer  
RFM  
A0 - A35  
B0 - B35  
Status Flag  
OR  
AE  
IR  
AF  
Logic  
Flag Offset  
Registers  
FS0/SD  
FS1/SEN  
10  
CLKB  
CSB  
W/RB  
ENB  
MBB  
Port-B  
Control  
Logic  
Mail 2  
Register  
4658 drw 01  
MBF2  
CIDTOandMtheMIDTEloRgoCareIrAegiLsteredTtrEadeMmaPrkoEfInRteAgraTtedUDeRvicEeTechRnoAlogNy, IGnc.ESyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
FEBRUARY 2009  
1
2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4658/3  
©

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