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72V3613L12PFG PDF预览

72V3613L12PFG

更新时间: 2024-09-17 10:43:15
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
26页 267K
描述
Bi-Directional FIFO, 64X36, 8ns, Synchronous, CMOS, PQFP120, GREEN, TQFP-120

72V3613L12PFG 数据手册

 浏览型号72V3613L12PFG的Datasheet PDF文件第2页浏览型号72V3613L12PFG的Datasheet PDF文件第3页浏览型号72V3613L12PFG的Datasheet PDF文件第4页浏览型号72V3613L12PFG的Datasheet PDF文件第5页浏览型号72V3613L12PFG的Datasheet PDF文件第6页浏览型号72V3613L12PFG的Datasheet PDF文件第7页 
3.3VOLTCMOSCLOCKEDFIFOWITH  
BUS-MATCHINGANDBYTESWAPPING  
64 x 36  
IDT72V3613  
Parity Generation can be selected for each Port  
FEATURES:  
Available in 132-pin plastic quad flat package (PQF), or space  
saving 120-pin thin quad flat package (TQFP)  
Pin and functionally compatible version of the 5V operating  
IDT723613  
Industrial temperature range (–40°C to +85°C) is available  
Green parts available, see ordering information  
64 x 36 storage capacity FIFO buffering data from Port A to Port B  
Supports clock frequencies up to 83MHz  
Fast access times of 8ns  
Free-running CLKA and CLKB may be asynchronous or  
coincident (permits simultaneous reading and writing of data on  
a single clock edge)  
Mailbox bypass registers in each direction  
Dynamic Port B bus sizing of 36 bits (long word), 18 bits (word),  
and 9 bits (byte)  
Selection of Big- or Little-Endian format for word and byte bus  
sizes  
Three modes of byte-order swapping on Port B  
Programmable Almost-Full and Almost-Empty flags  
Microprocessor interface control logic  
FF , AF flags synchronized by CLKA  
EF , AE flags synchronized by CLKB  
Passive parity checking on each Port  
DESCRIPTION:  
The IDT72V3613 is a pin and functionally compatible version of the  
IDT723613, designed to run off a 3.3V supply for exceptionally low-power  
consumption. This device is a monolithic, high-speed, low-power, CMOS  
synchronous(clocked)FIFOmemorywhichsupportsclockfrequenciesupto  
83MHzandhasread-accesstimesasfastas8ns.The64x36dual-portSRAM  
FIFO buffers data from port A to port B. The FIFO operates in IDT Standard  
modeandhasflagstoindicateemptyandfullconditions,andtwoprogrammable  
flags, Almost-Full(AF)andAlmost-Empty(AE), toindicate whena selected  
numberofwordsisstoredinmemory.FIFOdataonportBcanbeoutputin36-  
FUNCTIONALBLOCKDIAGRAM  
CLKA  
CSA  
W/RA  
ENA  
Port-A  
Control  
Logic  
MBA  
MBF1  
PEFB  
Parity  
Gen/Check  
Mail 1  
Register  
RST  
PGB  
Device  
Control  
ODD/  
EVEN  
RAM ARRAY  
64 x 36  
64 x 36  
36  
36  
Read  
Pointer  
Write  
Pointer  
B0 - B35  
Status Flag  
FF  
AF  
EF  
Logic  
AE  
FIFO  
CLKB  
CSB  
W/RB  
ENB  
BE  
SIZ0  
SIZ1  
SW0  
SW1  
Programmable  
Flag Offset  
Registers  
FS  
0
1
Port-B  
FS  
Control  
A - A35  
0
Logic  
PGA  
Mail 2  
Register  
Parity  
Gen/Check  
PEFA  
MBF2  
4661 drw 01  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.SyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL TEMPERATURE RANGE  
FEBRUARY 2009  
1
©2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4661/3  

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