Datasheet > 723632

723632

更新时间： 2024-11-20 14:57:59

品牌	Logo	应用领域
瑞萨 - RENESAS		先进先出芯片
页数	文件大小	规格书
25页	365K
描述
512 x 36 x 2 SyncBiFIFO, 5.0V

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中文翻译

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数据手册

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723632 数据手册

CMOS SyncBiFIFO^TM

256 x 36 x 2, 512 x 36 x 2,

1,024 x 36 x 2

IDT723622

IDT723632

IDT723642

• Fast access times of 10ns

• Available in space-saving 120-pin Thin Quad Flatpack (TQFP)

• Green parts available

FEATURES:

• Memory storage capacity:

IDT723622

IDT723632

IDT723642

–

256 x 36 x 2

512 x 36 x 2

1,024 x 36 x 2

DESCRIPTION:

• Free-running CLKA and CLKB may be asynchronous or

TheIDT723622/723632/723642areamonolithic,high-speed,low-power,

coincident (simultaneous reading and writing of data on a single CMOS Bidirectional SyncFIFO (clocked) memory which supports clock fre-

clock edge is permitted)

• Two independent clocked FIFOs buffering data in opposite

directions

• Mailbox bypass register for each FIFO

• Programmable Almost-Full and Almost-Empty flags

• Microprocessor Interface Control Logic

• IRA, ORA, AEA, and AFA flags synchronized by CLKA

• IRB, ORB, AEB, and AFB flags synchronized by CLKB

• Supports clock frequencies up to 66.7MHz

quencies up to 66.7MHz and have read access times as fast as 10ns.

Two independent 256/512/1,024 x 36 dual-port SRAM FIFOs on board

each chip buffer data in opposite directions. Communication between

each port may bypass the FIFOs via two 36-bit mailbox registers. Each

mailbox register has a flag to signal when new mail has been stored.

These devices are a synchronous (clocked) FIFO, meaning each port

employsasynchronousinterface.Alldatatransfersthroughaportaregated

totheLOW-to-HIGHtransitionofaportclockbyenablesignals.Theclocksfor

each port are independent of one another and can be asynchronous or

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

CLKA

Port-A

Control

Logic

CSA

W/RA

ENA

RAM

ARRAY

MBA

256 x 36

512 x 36

1,024 x 36

FIFO1,

Mail1

Reset

Logic

RST1

Write

Pointer

Read

Pointer

Status Flag

Logic

ORB

AEB

IRA

AFA

FIFO 1

Programmable Flag

Offset Registers

B0 - B35

- A35

FIFO 2

ORA

AEA

Status Flag

Logic

IRB

AFB

Read

Pointer

Write

Pointer

FIFO2,

Mail2

Reset

Logic

RST2

RAM

ARRAY

256 x 36

512 x 36

CLKB

CSB

Port-B

Control

Logic

1,024 x 36

W/RB

ENB

MBB

Mail 2

3022 drw 01

MBF2

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. SyncBiFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

FEBRUARY2015

COMMERCIAL TEMPERATURE RANGE

DSC-3022/6

12 3 4 5 6 7...25

中文翻译

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与723632相关器件

型号	品牌	获取价格	描述	数据表
723632L12PF8	IDT	获取价格	TQFP-120, Reel
723632L12PFG	IDT	获取价格	Bi-Directional FIFO, 512X36, 8ns, Synchronous, CMOS, PQFP120, TQFP-120
723632L12PQFG	IDT	获取价格	Bi-Directional FIFO, 512X36, 8ns, Synchronous, CMOS, PQFP132, PLASTIC, QFP-132
723632L15PF8	IDT	获取价格	TQFP-120, Reel
723632L15PFG	IDT	获取价格	CMOS SyncBiFIFO
723632L15PFG8	IDT	获取价格	CMOS SyncBiFIFO
723632L15PQF	IDT	获取价格	PQFP-132, Tray
723632L15PQFG	IDT	获取价格	Bi-Directional FIFO, 512X36, 10ns, Synchronous, CMOS, PQFP132, PLASTIC, QFP-132
723632L20PF	IDT	获取价格	Bi-Directional FIFO, 1KX36, 13ns, Synchronous, CMOS, PQFP120
723632L20PQF	IDT	获取价格	Bi-Directional FIFO, 1KX36, 13ns, Synchronous, CMOS, PQFP132

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