Datasheet > 71V016SA12BFG38

71V016SA12BFG38

更新时间： 2022-12-01 20:36:46

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
9页	135K
描述
Standard SRAM, 64KX16, 12ns, CMOS, PBGA48

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71V016SA12BFG38 数据手册

3.3V CMOS Static RAM

for Automotive Applications

1 Meg (64K x 16-Bit)

IDT71V016SA

Features

Description

◆

64K x 16 advanced high-speed CMOS Static RAM

TheIDT71V016isa1,048,576-bithigh-speedStaticRAMorganized

as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability

CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-

vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-

speedmemoryneedsandautomotiveapplications.

◆

Equal access and cycle times

— Automotive:12/15/20ns

One Chip Select plus one Output Enable pin

Bidirectional data inputs and outputs directly

◆

LVTTL-compatible

Low power consumption via chip deselect

Upper and Lower Byte Enable Pins

Single 3.3V power supply

The IDT71V016 has an output enable pin which operates as fast

as 5ns, with address access times as fast as 10ns. All bidirectional

inputsandoutputsoftheIDT71V016areLVTTL-compatibleandoperation

isfromasingle3.3Vsupply.Fullystaticasynchronouscircuitryisused,

requiringnoclocks orrefreshforoperation.

◆

Available in 44-pin Plastic SOJ, 44-pin TSOP, and

48-Ball Plastic FBGA packages

Functional Block Diagram

Output

The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic

SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.

Enable

Buffer

Address

Buffers

Row / Column

Decoders

A⁰– A¹⁵

I/O¹⁵

High

Byte

I/O

Chip

Enable

Buffer

I/O

Sense

Amps

and

Write

Drivers

64K x 16

Memory

Array

Write

Enable

Buffer

I/O⁷

I/O⁰

Low

Byte

I/O

Buffer

BHE

BLE

Byte

Enable

Buffers

6818 drw 01

DECEMBER 2004

DSC-6818/00

12 3 4 5 6 7...9

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