Datasheet > 7054S20PRF

7054S20PRF

更新时间： 2023-03-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
11页	97K
描述
TQFP-128, Tray

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数据手册

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7054S20PRF 数据手册

IDT7054S/L

HIGH-SPEED

4K x 8 FourPort^TM

STATIC RAM

◆

TTL-compatible; single 5V (±10%) power supply

Available in 128 pin Thin Quad Flatpack and 108 pin PGA

packages

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Features

◆

High-speed access

– Commercial:20/25/35ns (max.)

– Industrial:25ns (max.)

◆

– Military:25/35ns(max.)

Low-power operation

◆

Description

– IDT7054S

Active:750mW(typ.)

Standby: 7.5mW (typ.)

– IDT7054L

Active:750mW(typ.)

Standby: 1.5mW (typ.)

True FourPort memory cells which allow simultaneous

TheIDT7054isahigh-speed4Kx8FourPort™StaticRAMdesigned

to be used in systems where multiple access into a common RAM is

required.ThisFourPortStaticRAMoffersincreasedsystemperformance

inmultiprocessorsystemsthathaveaneedtocommunicateinrealtimeand

alsooffersaddedbenefitforhigh-speedsystemsinwhichmultipleaccess

is requiredinthe same cycle.

◆

access of the same memory locations

Fully asynchronous operation from each of the four ports:

P1, P2, P3, and P4

TheIDT7054is alsodesignedtobeusedinsystems whereon-chip

hardware port arbitration is not needed. This part lends itself to those

systems whichcannottoleratewaitstates oraredesignedtobeableto

◆

FunctionalBlockDiagram

R/WP1

CEP1

R/WP4

CEP4

OEP1

OEP4

COLUMN

I/O

COLUMN

I/O

I/O0P1-I/O7P1

I/O0P4-I/O7P4

PORT 1

PORT 4

ADDRESS

DECODE

LOGIC

ADDRESS

DECODE

LOGIC

0P1 - A11P1

0P2 - A11P2

0P4 - A11P4

MEMORY

ARRAY

PORT 2

ADDRESS

DECODE

LOGIC

PORT 3

ADDRESS

DECODE

LOGIC

A0P3 - A11P3

COLUMN

I/O

COLUMN

I/O

I/O0P2-I/O7P2

I/O0P3-I/O7P3

OEP3

OEP2

CEP2

CEP3

R/WP3

R/WP2

3241 drw 01

JANUARY 2009

DSC 3241/12

12 3 4 5 6 7...11

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