Datasheet > 7016S12JGI

7016S12JGI

更新时间： 2024-11-20 19:19:43

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器内存集成电路
页数	文件大小	规格书
21页	349K
描述
Dual-Port SRAM

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中文翻译

获取价格

技术参数
数据手册

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7016S12JGI 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.75
内存集成电路类型：	DUAL-PORT SRAM	Base Number Matches：	1

7016S12JGI 数据手册

HIGH-SPEED

16K X 9 DUAL-PORT

STATIC RAM

IDT7016S/L

◆

IDT7016 easily expands data bus width to 18 bits or

Features

more using the Master/Slave select when cascading

more than one device

M/S = VIH for BUSY output flag on Master

M/S = VIL for BUSY input on Slave

Busy and Interrupt Flag

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

TTL-compatible, single 5V (±10%) power supply

Available in ceramic 68-pin PGA, 68-pin PLCC, and an

80-pin TQFP

Industrial temperature range (–40°C to +85°C) is

available for selected speeds

Green parts available, see ordering information

◆

True Dual-Ported memory cells which allow simulta-

neous reads of the same memory location

High-speed access

◆

– Commercial:12/15/20/25/35ns (max.)

– Industrial: 20ns (max.)

◆

– Military: 20/25/35ns (max.)

Low-power operation

◆

– IDT7016S

◆

Active: 750mW (typ.)

Standby: 5mW (typ.)

– IDT7016L

Active: 750mW (typ.)

Standby: 1mW (typ.)

◆

Functional Block Diagram

OEL

OER

CER

CEL

R/WR

R/W

I/O0L- I/O8L

I/O0R-I/O8R

I/O

Control

BUSY ^(1,2)

(1,2)

BUSY

13L

13R

Address

Decoder

MEMORY

ARRAY

Address

Decoder

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

R/W

SEM

M/S

(2)

INTL

INT

3190 drw 01

NOTES:

1. In MASTER mode: BUSY is an output and is a push-pull driver

InSLAVEmode:BUSYisinput.

2. BUSYoutputsandINToutputsarenon-tri-statedpush-pulldrivers.

OCTOBER2014

DSC 3190/11

12 3 4 5 6 7...21

中文翻译

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