7015S35J8 PDF预览

7015S35J8

更新时间: 2025-07-20 19:18:23
品牌 Logo 应用领域
瑞萨 - RENESAS 存储
页数 文件大小 规格书
22页 340K
描述
存储容量(Mb):72Kb(8K x 9);内存数据长度(bit):8K ;字编码数(k):8K ;元器件封装:68-PLCC(24.21x24.21);

7015S35J8 数据手册

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7015L  
HIGH-SPEED  
8K x 9 DUAL-PORT  
STATIC RAM  
Features:  
M/S = VIH for BUSY output flag on Master  
M/S = VIL for BUSY input on Slave  
Busy and Interrupt Flag  
On-chip port arbitration logic  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in 68-pin PLCC  
True Dual-Ported memory cells which allow simultaneous  
reads of the same memory location  
High-speed access  
– Commercial:12ns(max.)  
Low-poweroperation  
– IDT7015L  
Active:750mW(typ.)  
Standby: 1mW (typ.)  
IDT7015 easily expands data bus width to 18 bits or more  
using the Master/Slave select when cascading more than  
onedevice  
Green parts available, see ordering information  
FunctionalBlockDiagram  
OE  
L
L
OE  
R
CER  
CE  
R/WR  
R/W  
L
I/O0L- I/O8L  
I/O0R-I/O8R  
I/O  
I/O  
Control  
Control  
BUSYL(1,2)  
(1,2)  
BUSY  
R
A
12L  
A
12R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
A
0L  
13  
13  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE  
OE  
R/W  
L
CE  
OE  
R/W  
R
R
L
R
L
SEM  
R
SEM  
INTL  
L
M/S  
(2)  
(2)  
INTR  
2954 drw 01  
NOTES:  
1. In MASTER mode: BUSY is an output and is a push-pull driver  
In SLAVE mode: BUSY is input.  
2. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.  
MAY 2019  
1
DSC 2954/13  

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