Datasheet > 6116LA45TPGI

6116LA45TPGI

更新时间： 2024-02-27 21:50:28

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器光电二极管
页数	文件大小	规格书
11页	611K
描述
Standard SRAM, 2KX8, 45ns, CMOS, PDIP24, 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-24

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6116LA45TPGI 数据手册

CMOS Static RAM

16K (2K x 8-Bit)

IDT6116SA

IDT6116LA

Features

Description

◆

High-speed access and chip select times

The IDT6116SA/LA is a 16,384-bit high-speed static RAM

organized as 2K x 8. It is fabricated using IDT's high-performance,

high-reliabilityCMOStechnology.

– Military:20/25/35/45/55/70/90/120/150ns(max.)

– Industrial:20/25/35/45ns(max.)

– Commercial:15/20/25/35/45ns(max.)

Low-power consumption

Battery backup operation

– 2V data retention voltage (LA version only)

Produced with advanced CMOS high-performance

technology

CMOS process virtually eliminates alpha particle soft-error consumesonly1µWto4µWoperatingoffa2Vbattery.

Access times as fastas 15ns are available. The circuitalsooffers a

reduced power standby mode. When CS goes HIGH, the circuit will

automatically go to, and remain in, a standby power mode, as long

as CS remains HIGH. This capability provides significant system level

power and cooling savings. The low-power (LA) version also offers a

battery backup data retention capability where the circuit typically

◆

rates

AllinputsandoutputsoftheIDT6116SA/LAareTTL-compatible.Fully

static asynchronous circuitry is used, requiring no clocks or refreshing

foroperation.

TheIDT6116SA/LAispackagedin24-pin600and300milplasticor

ceramicDIP,24-leadgull-wingSOIC,and24-leadJ-bendSOJproviding

highboard-levelpackingdensities.

◆

Input and output directly TTL-compatible

Static operation: no clocks or refresh required

Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip,

24-pin SOIC and 24-pin SOJ

◆

Military product compliant to MIL-STD-833, Class B

Military grade product is manufactured in compliance to the latest

version of MIL-STD-883, Class B, making it ideally suited to military

temperatureapplicationsdemandingthehighestlevelofperformanceand

reliability.

FunctionalBlockDiagram

128 X 128

MEMORY

ARRAY

ADDRESS

DECODER

GND

A ₁₀

I/O

I/O CONTROL

INPUT

DATA

CIRCUIT

I/O₇

CONTROL

CIRCUIT

3089 drw 01

JANUARY 2009

DSC-3089/06

12 3 4 5 6 7...11

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6116LA45YG	IDT	Standard SRAM, 2KX8, 45ns, CMOS, PDSO24, 0.300 INCH, ROHS COMPLIANT, SOJ-24	获取价格
6116LA45YGI	IDT	Standard SRAM, 2KX8, 45ns, CMOS, PDSO24, 0.300 INCH, ROHS COMPLIANT, SOJ-24	获取价格
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6116LA55DBRT	IDT	Standard SRAM, 2KX8, 55ns, CMOS, CDIP24	获取价格
6116LA55EB	IDT	Standard SRAM, 2KX8, 55ns, CMOS, CDFP24, 0.300 INCH, CERAMIC, PACKAGE-24	获取价格